[all-commits] [llvm/llvm-project] 6a570d: AMDGPU/GlobalISel: Fix non-pow-2 add/sub/mul for 1...

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 6a570dc548078af92a3cc0dda0d2ad1f371b0280
      https://github.com/llvm/llvm-project/commit/6a570dc548078af92a3cc0dda0d2ad1f371b0280
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-02-06 (Thu, 06 Feb 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Fix non-pow-2 add/sub/mul for 16-bit insts

These wouldn't legalize between 16-bits and 32-bits on targets with
16-bit instructions.