[all-commits] [llvm/llvm-project] 1024b7: AMDGPU: Split denormal mode tracking bits

Matt Arsenault via All-commits all-commits at lists.llvm.org
Tue Feb 4 10:44:32 PST 2020


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 1024b73ef5930148bf8016150aa5660f5bb9d153
      https://github.com/llvm/llvm-project/commit/1024b73ef5930148bf8016150aa5660f5bb9d153
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-02-04 (Tue, 04 Feb 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s32.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s64.mir
    M llvm/test/CodeGen/AMDGPU/omod-nsz-flag.mir
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll

  Log Message:
  -----------
  AMDGPU: Split denormal mode tracking bits

Prepare to accurately track the future denormal-fp-math attribute
changes. The way to actually set these separately is not wired in yet.

This is just a mechanical change, and mostly still assumes the input
and output mode match. This should be refined for some cases. For
example, fcanonicalize lowering should use the flushing variant if
either input or output flushing is enabled




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