[all-commits] [llvm/llvm-project] cd7650: GlobalISel: Implement fewerElementsVector for G_SE...

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: cd7650c186179ad156bfa0d8324d6662f2828aae
      https://github.com/llvm/llvm-project/commit/cd7650c186179ad156bfa0d8324d6662f2828aae
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-02-03 (Mon, 03 Feb 2020)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
    M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-sext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir

  Log Message:
  -----------
  GlobalISel: Implement fewerElementsVector for G_SEXT_INREG

Start using a new strategy with a combination of merge and unmerges.

This allows scalarizing before lowering, which in cases like
<2 x s128> avoids producing giant illegal shifts.