[all-commits] [llvm/llvm-project] c0b129: AMDGPU/GlobalISel: Use more wide vector load/stores

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: c0b12916a7e81ed5018cd94606d1d99dc759704e
      https://github.com/llvm/llvm-project/commit/c0b12916a7e81ed5018cd94606d1d99dc759704e
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-02-01 (Sat, 01 Feb 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Use more wide vector load/stores

This improves the type breakdown for some large vectors. For example,
we now get a <4 x s32> and s32 store instead of 5 s32 stores for
<5 x s32>.