[all-commits] [llvm/llvm-project] 17dbc6: AMDGPU: Cleanup and fix SMRD offset handling

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 17dbc6611df9044d779d85b3d545bd37e5dd5200
      https://github.com/llvm/llvm-project/commit/17dbc6611df9044d779d85b3d545bd37e5dd5200
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-30 (Thu, 30 Jan 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
    M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
    M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll

  Log Message:
  -----------
  AMDGPU: Cleanup and fix SMRD offset handling

I believe this also fixes bugs with CI 32-bit handling, which was
incorrectly skipping offsets that look like signed 32-bit values. Also
validate the offsets are dword aligned before folding.