[all-commits] [llvm/llvm-project] b3a1d0: [mlir] Add initial support for parsing a declarati...

[River Riddle via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: b3a1d09c1c7a50069941021881a8174409d90975
      https://github.com/llvm/llvm-project/commit/b3a1d09c1c7a50069941021881a8174409d90975
  Author: River Riddle <riddleriver at gmail.com>
  Date:   2020-01-30 (Thu, 30 Jan 2020)

  Changed paths:
    M mlir/include/mlir/IR/OpBase.td
    M mlir/include/mlir/TableGen/Type.h
    M mlir/lib/TableGen/Type.cpp
    A mlir/test/mlir-tblgen/op-format-spec.td
    M mlir/tools/mlir-tblgen/CMakeLists.txt
    M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
    A mlir/tools/mlir-tblgen/OpFormatGen.cpp
    A mlir/tools/mlir-tblgen/OpFormatGen.h

  Log Message:
  -----------
  [mlir] Add initial support for parsing a declarative operation assembly format

Summary:
This is the first revision in a series that adds support for declaratively specifying the asm format of an operation. This revision
focuses solely on parsing the format. Future revisions will add support for generating the proper parser/printer, as well as
transitioning the syntax definition of many existing operations.

This was originally proposed here:
https://llvm.discourse.group/t/rfc-declarative-op-assembly-format/340

Differential Revision: https://reviews.llvm.org/D73405


  Commit: 1c158d0f90919ba19b8749556ac3a60e9d99a312
      https://github.com/llvm/llvm-project/commit/1c158d0f90919ba19b8749556ac3a60e9d99a312
  Author: River Riddle <riddleriver at gmail.com>
  Date:   2020-01-30 (Thu, 30 Jan 2020)

  Changed paths:
    M mlir/include/mlir/IR/OpImplementation.h
    M mlir/test/lib/TestDialect/TestOps.td
    A mlir/test/mlir-tblgen/op-format.mlir
    M mlir/tools/mlir-tblgen/OpFormatGen.cpp

  Log Message:
  -----------
  [mlir] Add support for generating the parser/printer from the declarative operation format.

Summary:
This revision add support, and testing, for generating the parser and printer from the declarative operation format.

Differential Revision: https://reviews.llvm.org/D73406


  Commit: 82170d5619987aac0de1f7cc62bdcdc8a68e783c
      https://github.com/llvm/llvm-project/commit/82170d5619987aac0de1f7cc62bdcdc8a68e783c
  Author: River Riddle <riddleriver at gmail.com>
  Date:   2020-01-30 (Thu, 30 Jan 2020)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
    M mlir/include/mlir/Dialect/StandardOps/Ops.td
    M mlir/include/mlir/Dialect/VectorOps/VectorOps.td
    M mlir/include/mlir/IR/OpBase.td
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    M mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp
    M mlir/lib/Dialect/StandardOps/Ops.cpp
    M mlir/lib/Dialect/VectorOps/VectorOps.cpp
    M mlir/test/Dialect/LLVMIR/invalid.mlir

  Log Message:
  -----------
  [mlir] Update various operations to declaratively specify their assembly format.

Summary:
This revision switches over many operations to use the declarative methods for defining the assembly specification. This updates operations in the NVVM, ROCDL, Standard, and VectorOps dialects.

Differential Revision: https://reviews.llvm.org/D73407


  Commit: 528adb2e48035da1f0954d09236f7a63f79feab3
      https://github.com/llvm/llvm-project/commit/528adb2e48035da1f0954d09236f7a63f79feab3
  Author: River Riddle <riddleriver at gmail.com>
  Date:   2020-01-30 (Thu, 30 Jan 2020)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
    M mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
    M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
    M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
    M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
    M mlir/test/Dialect/LLVMIR/global.mlir
    M mlir/test/Dialect/LLVMIR/invalid.mlir
    M mlir/test/Dialect/Linalg/roundtrip.mlir

  Log Message:
  -----------
  [mlir][NFC] Use declarative format for several operations in LLVM and Linalg dialects

Differential Revision: https://reviews.llvm.org/D73503


  Commit: 389b12621041a03d693b3f369107df8f8dccf19e
      https://github.com/llvm/llvm-project/commit/389b12621041a03d693b3f369107df8f8dccf19e
  Author: River Riddle <riddleriver at gmail.com>
  Date:   2020-01-30 (Thu, 30 Jan 2020)

  Changed paths:
    M mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td
    M mlir/include/mlir/Dialect/SPIRV/SPIRVControlFlowOps.td
    M mlir/include/mlir/Dialect/SPIRV/SPIRVGroupOps.td
    M mlir/include/mlir/Dialect/SPIRV/SPIRVOps.td
    M mlir/include/mlir/Dialect/SPIRV/SPIRVStructureOps.td
    M mlir/lib/Dialect/SPIRV/SPIRVOps.cpp
    M mlir/test/Dialect/SPIRV/control-flow-ops.mlir

  Log Message:
  -----------
  [mlir][NFC] Update several SPIRV operations to use declarative parsers.

Differential Revision: https://reviews.llvm.org/D73504


Compare: https://github.com/llvm/llvm-project/compare/05badc60b7f4...389b12621041