[all-commits] [llvm/llvm-project] 610f1d: [AArch64][GlobalISel] During ISel try to convert G...

[AE via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 610f1d22f149790bebc6bee9e3d5f3b4c07b84ec
      https://github.com/llvm/llvm-project/commit/610f1d22f149790bebc6bee9e3d5f3b4c07b84ec
  Author: Amara Emerson <aemerson at apple.com>
  Date:   2020-01-29 (Wed, 29 Jan 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/load-addressing-modes.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] During ISel try to convert G_PTR_ADD to G_ADD.

This lowering tries to look for G_PTR_ADD instructions and then converts
them to a standard G_ADD with a COPY on the source, and G_INTTOPTR on the
result. This is ok for address space 0 on AArch64 as p0 can be treated as
s64.

The motivation behind this is to expose the add semantics to the imported
tablegen patterns. We shouldn't need to check for uses being loads/stores,
because the selector works bottom up, uses before defs. By the time we
end up trying to select a G_PTR_ADD, we should have already attempted to
fold this into addressing modes and were therefore unsuccessful.

This gives some performance and code size improvements across the board.

Differential Revision: https://reviews.llvm.org/D73673