[all-commits] [llvm/llvm-project] e5edd6: [X86] Use a shorter sequence to implement FLT_ROUNDS

[topperc via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: e5edd641fde0d3fae96593e02ef9453dffa5754a
      https://github.com/llvm/llvm-project/commit/e5edd641fde0d3fae96593e02ef9453dffa5754a
  Author: Craig Topper <craig.topper at intel.com>
  Date:   2020-01-29 (Wed, 29 Jan 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/flt-rounds.ll

  Log Message:
  -----------
  [X86] Use a shorter sequence to implement FLT_ROUNDS

This code needs to map from the FPCW 2-bit encoding for rounding mode to the 2-bit encoding defined for FLT_ROUNDS. The previous implementation did some clever swapping of bits and adding 1 modulo 4 to do the mapping.

This patch instead uses an 8-bit immediate as a lookup table of four 2-bit values. Then we use the 2-bit FPCW encoding to index the lookup table by using a right shift and an AND. This requires extracting the 2-bit value from FPCW and multipying it by 2 to make it usable as a shift amount. But still results in less code.

Differential Revision: https://reviews.llvm.org/D73599