[all-commits] [llvm/llvm-project] 4b414d: [PowerPC][Future] Add pld and pstd to future CPU

[Victor Huang via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 4b414d9adef26d5e840eb9a81ab5f30dc54996af
      https://github.com/llvm/llvm-project/commit/4b414d9adef26d5e840eb9a81ab5f30dc54996af
  Author: Victor Huang <wei.huang at ibm.com>
  Date:   2020-01-28 (Tue, 28 Jan 2020)

  Changed paths:
    M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
    M llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
    M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
    M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
    M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
    M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h
    M llvm/lib/Target/PowerPC/PPC.td
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    M llvm/lib/Target/PowerPC/PPCInstrPrefix.td
    M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
    M llvm/lib/Target/PowerPC/PPCSubtarget.h
    M llvm/test/CodeGen/PowerPC/future-check-features.ll
    M llvm/test/MC/Disassembler/PowerPC/future-invalid.txt
    M llvm/test/MC/Disassembler/PowerPC/futureinsts.txt
    A llvm/test/MC/PowerPC/future-errors.s
    M llvm/test/MC/PowerPC/future.s

  Log Message:
  -----------
  [PowerPC][Future] Add pld and pstd to future CPU
Add the prefixed instructions pld and pstd to future CPU. These are load and
store instructions that require new operand types that are 34 bits. This patch
adds the two instructions as well as the operand types required.

Note that this patch also makes a minor change to tablegen to account for the
fact that some instructions are going to require shifts greater than 31 bits
for the new 34 bit instructions.

Differential Revision: https://reviews.llvm.org/D72574