[all-commits] [llvm/llvm-project] e7e043: [DAG] Enable ISD::EXTRACT_SUBVECTOR SimplifyMultip...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: e7e043724e7b15e7bffc079528aa6aa8e4304a8b
      https://github.com/llvm/llvm-project/commit/e7e043724e7b15e7bffc079528aa6aa8e4304a8b
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-01-27 (Mon, 27 Jan 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/AArch64/vecreduce-and-legalization.ll
    M llvm/test/CodeGen/X86/avx-vperm2x128.ll
    M llvm/test/CodeGen/X86/bitcast-setcc-256.ll
    M llvm/test/CodeGen/X86/bitcast-vector-bool.ll
    M llvm/test/CodeGen/X86/masked_load.ll
    M llvm/test/CodeGen/X86/movmsk-cmp.ll
    M llvm/test/CodeGen/X86/pr31956.ll
    M llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll
    M llvm/test/CodeGen/X86/vec_int_to_fp.ll

  Log Message:
  -----------
  [DAG] Enable ISD::EXTRACT_SUBVECTOR SimplifyMultipleUseDemandedBits handling

This allows SimplifyDemandedBits to call SimplifyMultipleUseDemandedBits to create a simpler ISD::EXTRACT_SUBVECTOR, which is particularly useful for cases where we're splitting into subvectors anyhow.

Differential Revision: This allows SimplifyDemandedBits to call SimplifyMultipleUseDemandedBits to create a simpler ISD::EXTRACT_SUBVECTOR, which is particularly useful for cases where we're splitting into subvectors anyhow.