[all-commits] [llvm/llvm-project] fac994: AMDGPU: Fix ubsan error

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: fac9941e57013127593a47e02e7e88f56c9be2a4
      https://github.com/llvm/llvm-project/commit/fac9941e57013127593a47e02e7e88f56c9be2a4
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp

  Log Message:
  -----------
  AMDGPU: Fix ubsan error

Since register classes go up to 1024, 32 elements, all masks bits are
needed and a 32-bit shift by 32 is illegal. We didn't have any
instructions theoretically using a 32 element VGPR before
d1dbb5e4718a8f845abf0783513a33a55429470b