[all-commits] [llvm/llvm-project] c1cac2: [X86][AVX] Add AVX1/AVX2 ashr vector tests

[Simon Pilgrim via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: c1cac20827684949d381ae418f1868a76eaeda67
      https://github.com/llvm/llvm-project/commit/c1cac20827684949d381ae418f1868a76eaeda67
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M llvm/test/CodeGen/X86/sar_fold64.ll

  Log Message:
  -----------
  [X86][AVX] Add AVX1/AVX2 ashr vector tests


  Commit: fc5bbbf328bc2ef582cf1cf9ba5ac2ddfc12ea31
      https://github.com/llvm/llvm-project/commit/fc5bbbf328bc2ef582cf1cf9ba5ac2ddfc12ea31
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/test/CodeGen/X86/sar_fold64.ll

  Log Message:
  -----------
  [SelectionDAG] ComputeNumSignBits - add ISD::SUB demanded elts support


Compare: https://github.com/llvm/llvm-project/compare/ad24cf2a9420...fc5bbbf328bc