[all-commits] [llvm/llvm-project] 1192d7: AMDGPU/GlobalISel: Handle 16-bank LDS llvm.amdgcn....

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 1192d7b254722932465461214b5491e7463d33cd
      https://github.com/llvm/llvm-project/commit/1192d7b254722932465461214b5491e7463d33cd
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-22 (Wed, 22 Jan 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
    A llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Handle 16-bank LDS llvm.amdgcn.interp.p1.f16

The pattern is also mishandled by the generated matcher, so workaround
this as in the DAG path.

The existing DAG tests aren't particularly targeted to just this one
intrinsic. These also end up differing in scheduling from SGPR->VGPR
operand constraint copies.