[all-commits] [llvm/llvm-project] a174f0: AMDGPU/GlobalISel: Add pre-legalize combiner pass
Matt Arsenault via All-commits
all-commits at lists.llvm.org
Wed Jan 22 07:17:08 PST 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: a174f0da62f1cad36d21c040bf37bfdd291b28cf
https://github.com/llvm/llvm-project/commit/a174f0da62f1cad36d21c040bf37bfdd291b28cf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2020-01-22 (Wed, 22 Jan 2020)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
A llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
A llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
Log Message:
-----------
AMDGPU/GlobalISel: Add pre-legalize combiner pass
Just copy the AArch64 pass as-is for now, except for removing the
memcpy handling.
Commit: bcd91778fe7e6fc66cdccc5ddc3ff3fc48909f6b
https://github.com/llvm/llvm-project/commit/bcd91778fe7e6fc66cdccc5ddc3ff3fc48909f6b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2020-01-22 (Wed, 22 Jan 2020)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
A llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll
Log Message:
-----------
AMDGPU: Do binop of select of constant fold in AMDGPUCodeGenPrepare
DAGCombiner does this, but divisions expanded here miss this
optimization. Since 67aa18f165640374cf0e0a6226dc793bbda6e74f,
divisions have been expanded here and missed out on this
optimization. Avoids test regressions in a future patch.
Commit: 2fe500ab5bb4d50a5ac6ed9600f9900b46e55802
https://github.com/llvm/llvm-project/commit/2fe500ab5bb4d50a5ac6ed9600f9900b46e55802
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2020-01-22 (Wed, 22 Jan 2020)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
Log Message:
-----------
AMDGPU: Look through casted selects to constant fold bin ops
The promotion of the uniform select to i32 interfered with this fold.
Compare: https://github.com/llvm/llvm-project/compare/968561bcdc34...2fe500ab5bb4
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