[all-commits] [llvm/llvm-project] 64e952: AMDGPU: Fix missing immarg on llvm.amdgcn.interp.mov

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 64e95282012a81bf7a2a93473b85420a440839ee
      https://github.com/llvm/llvm-project/commit/64e95282012a81bf7a2a93473b85420a440839ee
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-22 (Wed, 22 Jan 2020)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll

  Log Message:
  -----------
  AMDGPU: Fix missing immarg on llvm.amdgcn.interp.mov

The first operand maps to an immediate field, so this should be
immarg.


  Commit: b94d3b9b77a0ee2e55a38133d69a458158ef4073
      https://github.com/llvm/llvm-project/commit/b94d3b9b77a0ee2e55a38133d69a458158ef4073
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-22 (Wed, 22 Jan 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    A llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.mov.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.f16.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: RegBankSelect interp intrinsics

Note this assumes the future use of immediates for immarg, not the
current G_CONSTANT which will be emitted.


Compare: https://github.com/llvm/llvm-project/compare/c0f53ed80662...b94d3b9b77a0