[all-commits] [llvm/llvm-project] e1d6d3: [SLP] Don't allow Div/Rem as alternate opcodes

[aelovikov-intel via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: e1d6d368529322edc658c893c01eaadaf8053ea6
      https://github.com/llvm/llvm-project/commit/e1d6d368529322edc658c893c01eaadaf8053ea6
  Author: Andrei Elovikov <andrei.elovikov at intel.com>
  Date:   2020-01-21 (Tue, 21 Jan 2020)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/X86/no_alternate_divrem.ll

  Log Message:
  -----------
  [SLP] Don't allow Div/Rem as alternate opcodes

Summary:
We don't have control/verify what will be the RHS of the division, so it might
happen to be zero, causing UB.

Reviewers: Vasilis, RKSimon, ABataev

Reviewed By: ABataev

Subscribers: vporpo, ABataev, hiraditya, llvm-commits, vdmitrie

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72740