[all-commits] [llvm/llvm-project] f3e73e: [ARM, MVE] Fix confusing MC names for MVE VMINA/VMA...

[Simon Tatham via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: f3e73e88fdd63e3342977873a5f2c3f870a2497a
      https://github.com/llvm/llvm-project/commit/f3e73e88fdd63e3342977873a5f2c3f870a2497a
  Author: Simon Tatham <simon.tatham at arm.com>
  Date:   2020-01-20 (Mon, 20 Jan 2020)

  Changed paths:
    M llvm/lib/Target/ARM/ARMInstrMVE.td

  Log Message:
  -----------
  [ARM,MVE] Fix confusing MC names for MVE VMINA/VMAXA insns.

Summary:
A recent commit accidentally defined names like `MVE_VMAXAs8` as
instances of the multiclass `MVE_VMINA`, and vice versa. This has no
effect on the test suite, because nothing directly refers to those
instruction names (the isel patterns are generated in Tablegen using
`!cast<Instruction>(NAME)` inside a lower-level multiclass). But it
means that `llvm-mc -show-inst` was listing VMAXA as VMINA, and it
would also affect any further draft code gen patches that use those
instruction ids.

Reviewers: MarkMurrayARM, dmgreen, miyuki, ostannard

Reviewed By: dmgreen

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73034