[all-commits] [llvm/llvm-project] 8e8a75: [TargetRegisterInfo] Default trackLivenessAfterReg...

[Fangrui Song via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 8e8a75ad50828b5093d6ba7aae0eba6dc290c90a
      https://github.com/llvm/llvm-project/commit/8e8a75ad50828b5093d6ba7aae0eba6dc290c90a
  Author: Fangrui Song <i at maskray.me>
  Date:   2020-01-19 (Sun, 19 Jan 2020)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
    M llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.h
    M llvm/lib/Target/AMDGPU/R600RegisterInfo.h
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
    M llvm/lib/Target/ARC/ARCRegisterInfo.cpp
    M llvm/lib/Target/ARC/ARCRegisterInfo.h
    M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
    M llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
    M llvm/lib/Target/AVR/AVRRegisterInfo.h
    M llvm/lib/Target/Hexagon/HexagonRegisterInfo.h
    M llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp
    M llvm/lib/Target/Lanai/LanaiRegisterInfo.h
    M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
    M llvm/lib/Target/Mips/MipsRegisterInfo.h
    M llvm/lib/Target/PowerPC/PPCRegisterInfo.h
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
    M llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
    M llvm/lib/Target/X86/X86RegisterInfo.cpp
    M llvm/lib/Target/X86/X86RegisterInfo.h
    M llvm/lib/Target/XCore/XCoreRegisterInfo.cpp
    M llvm/lib/Target/XCore/XCoreRegisterInfo.h

  Log Message:
  -----------
  [TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true

Except AMDGPU/R600RegisterInfo (a bunch of MIR tests seem to have
problems), every target overrides it with true. PostMachineScheduler
requires livein information. Not providing it can cause assertion
failures in ScheduleDAGInstrs::addSchedBarrierDeps().