[all-commits] [llvm/llvm-project] 20ca49: AMDGPU: Update tests to use modern buffer intrinsics

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 20ca49b646b73619b05d1a6908c5ab3416f53f97
      https://github.com/llvm/llvm-project/commit/20ca49b646b73619b05d1a6908c5ab3416f53f97
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-16 (Thu, 16 Jan 2020)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/amdpal.ll
    M llvm/test/CodeGen/AMDGPU/else.ll
    M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.softwqm.ll
    M llvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll
    M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
    M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr.ll
    M llvm/test/CodeGen/AMDGPU/uniform-branch-intrinsic-cond.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll
    M llvm/test/CodeGen/AMDGPU/wait.ll
    M llvm/test/CodeGen/AMDGPU/wave32.ll
    M llvm/test/CodeGen/AMDGPU/wqm.ll

  Log Message:
  -----------
  AMDGPU: Update tests to use modern buffer intrinsics


  Commit: 86d14ed766eb10b2c0c61126343bb305676d85de
      https://github.com/llvm/llvm-project/commit/86d14ed766eb10b2c0c61126343bb305676d85de
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-16 (Thu, 16 Jan 2020)

  Changed paths:
    M llvm/include/llvm/Target/TargetSelectionDAG.td

  Log Message:
  -----------
  TableGen: Remove dead code


  Commit: 03a592f18ba57d52a65e70ad5e1dd709cdcfb71d
      https://github.com/llvm/llvm-project/commit/03a592f18ba57d52a65e70ad5e1dd709cdcfb71d
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-16 (Thu, 16 Jan 2020)

  Changed paths:
    A llvm/test/TableGen/GlobalISelEmitter-input-discard.td
    M llvm/utils/TableGen/GlobalISelEmitter.cpp

  Log Message:
  -----------
  TableGen/GlobalISel: Fix srcvalue inputs

Allow using srcvalue for discarding pattern inputs.


  Commit: 0d0fce42b0ea7c7ce18cd0191f95204a0b800b15
      https://github.com/llvm/llvm-project/commit/0d0fce42b0ea7c7ce18cd0191f95204a0b800b15
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-16 (Thu, 16 Jan 2020)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/TargetLoweringBase.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZISelLowering.h
    M llvm/lib/Target/XCore/XCoreISelLowering.cpp
    M llvm/lib/Target/XCore/XCoreISelLowering.h
    M llvm/test/CodeGen/AArch64/GlobalISel/constant-dbg-loc.ll
    A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-load-metadata.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stackprotect-check.ll
    A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-store-metadata.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/localizer-arm64-tti.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
    M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/var_arg.ll
    M llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll

  Log Message:
  -----------
  GlobalISel: Preserve load/store metadata in IRTranslator

This was dropping the invariant metadata on dead argument loads, so
they weren't deleted.

Atomics still need to be fixed the same way. Also, apparently store
was never preserving dereferencable which should also be fixed.


  Commit: d0943537e10e25281164bb27df843e283dc6666c
      https://github.com/llvm/llvm-project/commit/d0943537e10e25281164bb27df843e283dc6666c
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-16 (Thu, 16 Jan 2020)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/TargetLoweringBase.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-atomic-metadata.ll

  Log Message:
  -----------
  GlobalISel: Apply target MMO flags to atomics

Unify MMO flag handling with SelectionDAG like with loads and stores.


  Commit: de4f88df97cbc99b0a7855b177d62f62f4ddd533
      https://github.com/llvm/llvm-project/commit/de4f88df97cbc99b0a7855b177d62f62f4ddd533
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-16 (Thu, 16 Jan 2020)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/couldnt-join-subrange-3.mir

  Log Message:
  -----------
  AMDGPU: Remove IR section from MIR test

Also generate check lines so this isn't just testing the meaningless
block name.


Compare: https://github.com/llvm/llvm-project/compare/c0d909a1b12f...de4f88df97cb