[all-commits] [llvm/llvm-project] 3ab7b7: TableGen/GlobalISel: Don't reconstruct CodeGenRegBank

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 3ab7b7f53552a0969bd89db3317eb5a3ddf31d8f
      https://github.com/llvm/llvm-project/commit/3ab7b7f53552a0969bd89db3317eb5a3ddf31d8f
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-15 (Wed, 15 Jan 2020)

  Changed paths:
    M llvm/utils/TableGen/GlobalISelEmitter.cpp

  Log Message:
  -----------
  TableGen/GlobalISel: Don't reconstruct CodeGenRegBank

The maps for dealing with the relationships between different register
classes and subregister indexes rely on unique pointers for every
class/index. By constructing a second copy of CodeGenRegBank, two
different pointer values existed for a given subregister depending on
where you were querying.

Use the existing CodeGenRegBank owned by the CodeGenTarget instead of
constructing a second copy. This avoids incorrectly failing map
lookups in a future change.


  Commit: eafa8dbefe30c85e58efc5309793f2d7c2109e35
      https://github.com/llvm/llvm-project/commit/eafa8dbefe30c85e58efc5309793f2d7c2109e35
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-15 (Wed, 15 Jan 2020)

  Changed paths:
    M llvm/utils/TableGen/GlobalISelEmitter.cpp

  Log Message:
  -----------
  TableGen/GlobalISel: Don't take reference to temporary values

These return temporary Optional<> values which are immediately
destroyed. I'm not sure why no sanitizers seem to have caught this,
but I encountered crashes on these in a future patch.


  Commit: 8931fde869c2787886a5f84c03f70cd32e2e8b1f
      https://github.com/llvm/llvm-project/commit/8931fde869c2787886a5f84c03f70cd32e2e8b1f
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-15 (Wed, 15 Jan 2020)

  Changed paths:
    M llvm/utils/TableGen/CodeGenRegisters.h
    M llvm/utils/TableGen/RISCVCompressInstEmitter.cpp

  Log Message:
  -----------
  TableGen: Delete some copy constuctors

Some register related machinery relies on uniqued, static pointers for
register classes and subregisters, so try to make sure these are never
copied.


  Commit: 91715617ad601c6bd953e1c47ecaaf3610de233f
      https://github.com/llvm/llvm-project/commit/91715617ad601c6bd953e1c47ecaaf3610de233f
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-15 (Wed, 15 Jan 2020)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir

  Log Message:
  -----------
  GlobalISel: Fix narrowScalar for G_ANYEXT results

This is nearly the same as G_ZEXT.


  Commit: bd7658a212ebc27a8f7d69666820df33bc8d61f5
      https://github.com/llvm/llvm-project/commit/bd7658a212ebc27a8f7d69666820df33bc8d61f5
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-15 (Wed, 15 Jan 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/test/MC/AMDGPU/vop3.s

  Log Message:
  -----------
  AMDGPU: Partially directly select llvm.amdgcn.interp.p1.f16

The 16 bank LDS case is complicated due to using multiple
instructions. If I attempt to write a pattern for it, the generated
selector incorrectly places the copy to m0 after the first
instruction, so that needs to be separately addressed.

Also fix not gluing the copy to m0 to the second operation in the
second half of the 16 bank lowering.


  Commit: 936483fb7dd2c8c6b014516ff3b3cd13740e0518
      https://github.com/llvm/llvm-project/commit/936483fb7dd2c8c6b014516ff3b3cd13740e0518
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-15 (Wed, 15 Jan 2020)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir

  Log Message:
  -----------
  GlobalISel: Implement lower for G_BITCAST

Bitcast only really applies between scalars and vectors. Implement as
an unmerge and remerge. The test needs to tolerate failure since one
of the unmerges currently fails to legalize.


Compare: https://github.com/llvm/llvm-project/compare/46e3edcc2c89...936483fb7dd2