[all-commits] [llvm/llvm-project] 0dc6c2: [AMDGPU] Invert the handling of skip insertion.

[cdevadas via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 0dc6c249bffac9f23a605ce4e42a84341da3ddbd
      https://github.com/llvm/llvm-project/commit/0dc6c249bffac9f23a605ce4e42a84341da3ddbd
  Author: cdevadas <cdevadas at amd.com>
  Date:   2020-01-15 (Wed, 15 Jan 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    M llvm/lib/Target/AMDGPU/SIInsertSkips.cpp
    M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
    A llvm/lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
    M llvm/test/CodeGen/AMDGPU/branch-condition-and.ll
    M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
    M llvm/test/CodeGen/AMDGPU/call-skip.ll
    M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
    M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
    M llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll
    M llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll
    M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
    M llvm/test/CodeGen/AMDGPU/else.ll
    M llvm/test/CodeGen/AMDGPU/hoist-cond.ll
    M llvm/test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir
    M llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir
    M llvm/test/CodeGen/AMDGPU/insert-skips-ignored-insts.mir
    M llvm/test/CodeGen/AMDGPU/insert-skips-kill-uncond.mir
    M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
    M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
    M llvm/test/CodeGen/AMDGPU/ret_jump.ll
    M llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll
    M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
    M llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
    M llvm/test/CodeGen/AMDGPU/skip-branch-taildup-ret.mir
    M llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll
    M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
    M llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll
    M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
    M llvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
    M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
    M llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
    M llvm/test/CodeGen/AMDGPU/valu-i1.ll
    M llvm/test/CodeGen/AMDGPU/wave32.ll
    M llvm/test/CodeGen/AMDGPU/wqm.ll

  Log Message:
  -----------
  [AMDGPU] Invert the handling of skip insertion.

The current implementation of skip insertion (SIInsertSkip) makes it a
mandatory pass required for correctness. Initially, the idea was to
have an optional pass. This patch inserts the s_cbranch_execz upfront
during SILowerControlFlow to skip over the sections of code when no
lanes are active. Later, SIRemoveShortExecBranches removes the skips
for short branches, unless there is a sideeffect and the skip branch is
really necessary.

This new pass will replace the handling of skip insertion in the
existing SIInsertSkip Pass.

Differential revision: https://reviews.llvm.org/D68092