[all-commits] [llvm/llvm-project] 01a4b8: [codegen, amdgpu] Enhance MIR DIE and re-arrange it...

darkbuck via All-commits all-commits at lists.llvm.org
Tue Jan 14 16:26:25 PST 2020


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 01a4b83154760ea286117ac4de9576b8a215cb8d
      https://github.com/llvm/llvm-project/commit/01a4b83154760ea286117ac4de9576b8a215cb8d
  Author: Michael Liao <michael.hliao at gmail.com>
  Date:   2020-01-14 (Tue, 14 Jan 2020)

  Changed paths:
    M llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
    M llvm/test/CodeGen/AMDGPU/bswap.ll
    M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
    A llvm/test/CodeGen/AMDGPU/dead-machine-elim-after-dead-lane.ll
    R llvm/test/CodeGen/AMDGPU/dead-mi-use-same-intr.mir
    M llvm/test/CodeGen/AMDGPU/idot8u.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll
    M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
    M llvm/test/CodeGen/AMDGPU/loop_break.ll
    M llvm/test/CodeGen/AMDGPU/select.f16.ll
    M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll

  Log Message:
  -----------
  [codegen,amdgpu] Enhance MIR DIE and re-arrange it for AMDGPU.

Summary:
- `dead-mi-elimination` assumes MIR in the SSA form and cannot be
  arranged after phi elimination or DeSSA. It's enhanced to handle the
  dead register definition by skipping use check on it. Once a register
  def is `dead`, all its uses, if any, should be `undef`.
- Re-arrange the DIE in RA phase for AMDGPU by placing it directly after
  `detect-dead-lanes`.
- Many relevant tests are refined due to different register assignment.

Reviewers: rampitec, qcolombet, sunfish

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72709




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