[all-commits] [llvm/llvm-project] b777e5: [MachineScheduler] Reduce reordering due to mem op...

[jayfoad via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: b777e551f044bbc7245a0b535e46000469479ff6
      https://github.com/llvm/llvm-project/commit/b777e551f044bbc7245a0b535e46000469479ff6
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2020-01-14 (Tue, 14 Jan 2020)

  Changed paths:
    M llvm/lib/CodeGen/MachineScheduler.cpp
    M llvm/test/CodeGen/AArch64/aarch64-stp-cluster.ll
    M llvm/test/CodeGen/AArch64/arm64-ldp-cluster.ll
    M llvm/test/CodeGen/AArch64/arm64-memset-inline.ll
    M llvm/test/CodeGen/AArch64/expand-select.ll
    M llvm/test/CodeGen/AArch64/global-merge-group-by-use.ll
    M llvm/test/CodeGen/AArch64/machine-scheduler.mir
    M llvm/test/CodeGen/AMDGPU/bitcast-constant-to-vector.ll
    M llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll
    M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
    M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
    M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
    M llvm/test/CodeGen/AMDGPU/ds_read2.ll
    M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
    M llvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
    M llvm/test/CodeGen/AMDGPU/kernel-args.ll
    M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
    M llvm/test/CodeGen/AMDGPU/max.i16.ll
    M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
    M llvm/test/CodeGen/AMDGPU/shift-i128.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll

  Log Message:
  -----------
  [MachineScheduler] Reduce reordering due to mem op clustering

Summary:
Mem op clustering adds a weak edge in the DAG between two loads or
stores that should be clustered, but the direction of this edge is
pretty arbitrary (it depends on the sort order of MemOpInfo, which
represents the operands of a load or store). This often means that two
loads or stores will get reordered even if they would naturally have
been scheduled together anyway, which leads to test case churn and goes
against the scheduler's "do no harm" philosophy.

The fix makes sure that the direction of the edge always matches the
original code order of the instructions.

Reviewers: atrick, MatzeB, arsenm, rampitec, t.p.northover

Subscribers: jvesely, wdng, nhaehnle, kristof.beyls, hiraditya, javed.absar, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72706