[all-commits] [llvm/llvm-project] e27632: [ARM][LowOverheadLoops] Allow all MVE instrs.

[Sam Parker via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: e27632c3026328e41b0d7dbf25631041e979a2f9
      https://github.com/llvm/llvm-project/commit/e27632c3026328e41b0d7dbf25631041e979a2f9
  Author: Sam Parker <sam.parker at arm.com>
  Date:   2020-01-14 (Tue, 14 Jan 2020)

  Changed paths:
    M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
    A llvm/test/CodeGen/Thumb2/LowOverheadLoops/add_reduce.mir
    A llvm/test/CodeGen/Thumb2/LowOverheadLoops/vmldava_in_vpt.mir
    M llvm/unittests/Target/ARM/MachineInstrTest.cpp

  Log Message:
  -----------
  [ARM][LowOverheadLoops] Allow all MVE instrs.

We have a whitelist of instructions that we allow when tail
predicating, since these are trivial ones that we've deemed need no
special handling. Now change ARMLowOverheadLoops to allow the
non-trivial instructions if they're contained within a valid VPT
block. Since a valid block is one that is predicated upon the VCTP so
we know that these non-trivial instructions will still behave as
expected once the implicit predication is used instead.

This also fixes a previous test failure.

Differential Revision: https://reviews.llvm.org/D72509