[all-commits] [llvm/llvm-project] 7efc7c: [X86][SSE] Add knownbits test showing missing getV...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 7efc7ca8edf6762dc64472417dabfbbdd838ceeb
      https://github.com/llvm/llvm-project/commit/7efc7ca8edf6762dc64472417dabfbbdd838ceeb
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-01-13 (Mon, 13 Jan 2020)

  Changed paths:
    M llvm/test/CodeGen/X86/combine-shl.ll

  Log Message:
  -----------
  [X86][SSE] Add knownbits test showing missing getValidMinimumShiftAmountConstant() ISD::SHL support

As mentioned on D72573


  Commit: ef5debac4302cd479ddd9e784a5b5acc8c2b9804
      https://github.com/llvm/llvm-project/commit/ef5debac4302cd479ddd9e784a5b5acc8c2b9804
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-01-13 (Mon, 13 Jan 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/test/CodeGen/X86/combine-shl.ll

  Log Message:
  -----------
  [SelectionDAG] ComputeKnownBits add getValidMinimumShiftAmountConstant() ISD::SHL support

As mentioned on D72573


Compare: https://github.com/llvm/llvm-project/compare/b96ec492d34e...ef5debac4302