[all-commits] [llvm/llvm-project] 9949b1: [GlobalISel][AArch64] Import + select LDR*roW and ...

[Jessica Paquette via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 9949b1a1753aa0f229c5b55ea01ec96f48164d9e
      https://github.com/llvm/llvm-project/commit/9949b1a1753aa0f229c5b55ea01ec96f48164d9e
  Author: Jessica Paquette <jpaquette at apple.com>
  Date:   2020-01-09 (Thu, 09 Jan 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/load-wro-addressing-modes.mir
    A llvm/test/CodeGen/AArch64/GlobalISel/store-wro-addressing-modes.mir

  Log Message:
  -----------
  [GlobalISel][AArch64] Import + select LDR*roW and STR*roW patterns

This adds support for selecting a large chunk of the load/store *roW patterns.

This is pretty much a straight port of AArch64DAGToDAGISel::SelectAddrModeWRO
into GISel. The code is very similar to the XRO code. The main difference is
that in the *roW patterns, we want to try and fold in an extend, and *possibly*
a shift along with it. A good portion of this patch is refactoring the existing
XRO code.

- Add selectAddrModeWRO

- Factor out the code from selectAddrModeShiftedExtendXReg which is used by both
  selectAddrModeXRO and selectAddrModeWRO into selectExtendedSHL.
  This is similar to the function of the same name in AArch64DAGToDAGISel.

- Add support for extends to the factored out code in selectExtendedSHL.

- Teach getExtendTypeForInst how to handle AND masks that are intended to be
  used in loads/stores (necessary for this addressing mode.)

- Make getExtendTypeForInst not static because moving it made an annoying diff
  and I wanted to have the WRO/XRO functions close to each other while I was
  writing the code.

Differential Revision: https://reviews.llvm.org/D72426