[all-commits] [llvm/llvm-project] 0eb981: [ARM] Use correct TRAP opcode for thumb in FastISel
David Green via All-commits
all-commits at lists.llvm.org
Mon Jan 6 08:40:54 PST 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: 0eb981b8ce70d07b1b1fb39b969a6fe9509840c1
https://github.com/llvm/llvm-project/commit/0eb981b8ce70d07b1b1fb39b969a6fe9509840c1
Author: David Green <david.green at arm.com>
Date: 2020-01-06 (Mon, 06 Jan 2020)
Changed paths:
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/test/CodeGen/ARM/load_store_opt_clobber_cpsr.mir
Log Message:
-----------
[ARM] Use correct TRAP opcode for thumb in FastISel
We were previously unconditionally using the ARM::TRAP opcode, even
under Thumb. My understanding is that these are essentially the same
thing (they both result in a trap under Thumb), but the ARM::TRAP opcode
is marked as requiring IsARM, so it is more correct to use ARM::tTRAP.
Differential Revision: https://reviews.llvm.org/D72075
Commit: f88d52728b9c7f91e4cfec657c0fc60be07d2cb4
https://github.com/llvm/llvm-project/commit/f88d52728b9c7f91e4cfec657c0fc60be07d2cb4
Author: David Green <david.green at arm.com>
Date: 2020-01-06 (Mon, 06 Jan 2020)
Changed paths:
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/test/CodeGen/Thumb2/segmented-stacks.ll
Log Message:
-----------
[ARM] Use the correct opcodes for Thumb2 segmented stack frame lowering
The segmented stack lowering code appears to be using ARM opcodes under
Thumb2. The MRC opcode will be the same for Thumb and ARM, but t2LDR
seems wrong. Either way, using the correct thumb vs arm opcodes is more
correct.
Differential Revision: https://reviews.llvm.org/D72074
Compare: https://github.com/llvm/llvm-project/compare/61b5e727b7cc...f88d52728b9c
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