[all-commits] [llvm/llvm-project] 285d5e: [LegalizeVectorOps] Split most of ExpandStrictFPOp...

topperc via All-commits all-commits at lists.llvm.org
Sat Jan 4 21:14:05 PST 2020


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 285d5e6b8b1ecc70c25468b6c7458d2adadeddf3
      https://github.com/llvm/llvm-project/commit/285d5e6b8b1ecc70c25468b6c7458d2adadeddf3
  Author: Craig Topper <craig.topper at gmail.com>
  Date:   2020-01-04 (Sat, 04 Jan 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

  Log Message:
  -----------
  [LegalizeVectorOps] Split most of ExpandStrictFPOp into a separate UnrollStrictFPOp method. Call that method from ExpandUINT_TO_FLOAT.

ExpandStrictFPOp calls ExpandUINT_TO_FLOAT. Previously, ExpandUINT_TO_FLOAT
returned SDValue() if it wasn't able to handle and needed to unroll.
Then ExpandStrictFPOp would detect his SDValue() and do the unroll.

After this change, ExpandUINT_TO_FLOAT will directly call
UnrollStrictFPOp and return the unrolled result.


  Commit: 16a67d252c72332423bae6597a0685248fc3501f
      https://github.com/llvm/llvm-project/commit/16a67d252c72332423bae6597a0685248fc3501f
  Author: Craig Topper <craig.topper at gmail.com>
  Date:   2020-01-04 (Sat, 04 Jan 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

  Log Message:
  -----------
  [TargetLowering] In expandFP_TO_UINT, add proper extend or truncate for the condition to feed the DstVT select.

Previously, for vectors we created a vselect with a condition that
didn't match what the target wanted according to getSetCCResultType.

To make up for this, X86 had a special DAG combine to detect if
the condition was all sign bits and then insert its own truncate
or extend. By adding the extend/truncate here explicitly we can
avoid that.


  Commit: 4e37d60f2a6b66ce95a039e6c929e7e38af30cd1
      https://github.com/llvm/llvm-project/commit/4e37d60f2a6b66ce95a039e6c929e7e38af30cd1
  Author: Craig Topper <craig.topper at gmail.com>
  Date:   2020-01-04 (Sat, 04 Jan 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
    M llvm/test/CodeGen/X86/vec-strict-fptoint-128.ll
    M llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll
    M llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll

  Log Message:
  -----------
  [LegalizeVectorOps][X86] Enable expansion of vector fp_to_uint in LegalizeVectorOps to avoid scalarization.

The code here isn't great in all caess. Particularly v4f64->v4i32
on 64-bit AVX targets. But there is some improvement in some
configurations.

There's definitely some issues with computeNumSignBits with
X86ISD::STRICT_FCMP. As well as not being able to propagate sign
bits through merge_values nodes that get created during custom
legalization.


Compare: https://github.com/llvm/llvm-project/compare/085898d469ab...4e37d60f2a6b


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