[all-commits] [llvm/llvm-project] a041c4: [InstCombine] fold zext of masked bit set/clear

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  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: a041c4ec6f7aa659b235cb67e9231a05e0a33b7d
      https://github.com/llvm/llvm-project/commit/a041c4ec6f7aa659b235cb67e9231a05e0a33b7d
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2019-12-31 (Tue, 31 Dec 2019)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
    M llvm/test/Transforms/InstCombine/zext.ll

  Log Message:
  -----------
  [InstCombine] fold zext of masked bit set/clear

This does not solve PR17101, but it is one of the
underlying diffs noted here:
https://bugs.llvm.org/show_bug.cgi?id=17101#c8

We could ease the one-use checks for the 'clear'
(no 'not' op) half of the transform, but I do not
know if that asymmetry would make things better
or worse.

Proofs:
https://rise4fun.com/Alive/uVB

  Name: masked bit set
  %sh1 = shl i32 1, %y
  %and = and i32 %sh1, %x
  %cmp = icmp ne i32 %and, 0
  %r = zext i1 %cmp to i32
  =>
  %s = lshr i32 %x, %y
  %r = and i32 %s, 1

  Name: masked bit clear
  %sh1 = shl i32 1, %y
  %and = and i32 %sh1, %x
  %cmp = icmp eq i32 %and, 0
  %r = zext i1 %cmp to i32
  =>
  %xn = xor i32 %x, -1
  %s = lshr i32 %xn, %y
  %r = and i32 %s, 1