[all-commits] [llvm/llvm-project] 0f0330: [PowerPC] Legalize rounding nodes

[Nemanja Ivanovic via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 0f0330a7870929558b2a2571ab28d242e719142e
      https://github.com/llvm/llvm-project/commit/0f0330a7870929558b2a2571ab28d242e719142e
  Author: Nemanja Ivanovic <nemanja.i.ibm at gmail.com>
  Date:   2019-12-30 (Mon, 30 Dec 2019)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCInstrVSX.td
    M llvm/test/CodeGen/PowerPC/fp-int128-fp-combine.ll
    M llvm/test/CodeGen/PowerPC/rounding-ops.ll
    A llvm/test/CodeGen/PowerPC/scalar-rounding-ops.ll
    M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll

  Log Message:
  -----------
  [PowerPC] Legalize rounding nodes

VSX provides a full complement of rounding instructions yet we somehow ended up
with some of them legal and others not. This just legalizes all of the FP
rounding nodes and the FP -> int rounding nodes with unsafe math.

Differential revision: https://reviews.llvm.org/D69949