[all-commits] [llvm/llvm-project] 14fc20: Align branches within 32-Byte boundary (NOP padding)

[Philip Reames via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 14fc20ca62821b5f85582bf76a467d412248c248
      https://github.com/llvm/llvm-project/commit/14fc20ca62821b5f85582bf76a467d412248c248
  Author: Philip Reames <listmail at philipreames.com>
  Date:   2019-12-20 (Fri, 20 Dec 2019)

  Changed paths:
    M llvm/include/llvm/MC/MCAsmBackend.h
    M llvm/include/llvm/MC/MCAssembler.h
    M llvm/include/llvm/MC/MCFragment.h
    M llvm/include/llvm/MC/MCObjectStreamer.h
    M llvm/lib/MC/MCAssembler.cpp
    M llvm/lib/MC/MCFragment.cpp
    M llvm/lib/MC/MCObjectStreamer.cpp
    M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
    A llvm/test/MC/X86/align-branch-32-1a.s
    A llvm/test/MC/X86/align-branch-64-1a.s
    A llvm/test/MC/X86/align-branch-64-1b.s
    A llvm/test/MC/X86/align-branch-64-1c.s
    A llvm/test/MC/X86/align-branch-64-1d.s
    A llvm/test/MC/X86/align-branch-64-2a.s
    A llvm/test/MC/X86/align-branch-64-2b.s
    A llvm/test/MC/X86/align-branch-64-2c.s
    A llvm/test/MC/X86/align-branch-64-3a.s
    A llvm/test/MC/X86/align-branch-64-4a.s
    A llvm/test/MC/X86/align-branch-64-5a.s
    A llvm/test/MC/X86/align-branch-64-5b.s

  Log Message:
  -----------
  Align branches within 32-Byte boundary (NOP padding)

WARNING: If you're looking at this patch because you're looking for a full
performace mitigation of the Intel JCC Erratum, this is not it!

This is a preliminary patch on the patch towards mitigating the performance
regressions caused by Intel's microcode update for Jump Conditional Code
Erratum.  For context, see:
https://www.intel.com/content/www/us/en/support/articles/000055650.html

The patch adds the required assembler infrastructure and command line options
needed to exercise the logic for INTERNAL TESTING.  These are NOT public flags,
and should not be used for anything other than LLVM's own testing/debugging
purposes.  They are likely to change both in spelling and meaning.

WARNING: This patch is knowingly incorrect in some cornercases.  We need, and
do not yet provide, a mechanism to selective enable/disable the padding.
Conversation on this will continue in parellel with work on extending this
infrastructure to support prefix padding.

The goal here is to have the assembler align specific instructions such that
they neither cross or end at a 32 byte boundary.  The impacted instructions are:
a. Conditional jump.
b. Fused conditional jump.
c. Unconditional jump.
d. Indirect jump.
e. Ret.
f. Call.

The new options for llvm-mc are:
    -x86-align-branch-boundary=NUM aligns branches within NUM byte boundary.
    -x86-align-branch=TYPE[+TYPE...] specifies types of branches to align.

A new MCFragment type, MCBoundaryAlignFragment, is added, which may emit
NOP to align the fused/unfused branch.

alignBranchesBegin inserts MCBoundaryAlignFragment before instructions,
alignBranchesEnd marks the end of the branch to be aligned,
relaxBoundaryAlign grows or shrinks sizes of NOP to align the target branch.

Nop padding is disabled when the instruction may be rewritten by the linker,
such as TLS Call.

Process Note: I am landing a patch by skan as it has been LGTMed, and
continuing to iterate on the review is simply slowing us down at this point.
We can and will continue to iterate in tree.

Patch By: skan
Differential Revision: https://reviews.llvm.org/D70157