[all-commits] [llvm/llvm-project] 9fceba: [SystemZ] Add a mapping from "select register" to...

[Jonas Paulsson via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 9fcebad5e5c1530d6d63a2b3d137dd1473b3b615
      https://github.com/llvm/llvm-project/commit/9fcebad5e5c1530d6d63a2b3d137dd1473b3b615
  Author: Jonas Paulsson <paulsson at linux.vnet.ibm.com>
  Date:   2019-12-20 (Fri, 20 Dec 2019)

  Changed paths:
    M llvm/lib/Target/SystemZ/SystemZInstrFormats.td
    M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
    M llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
    M llvm/lib/Target/SystemZ/SystemZShortenInst.cpp
    M llvm/test/CodeGen/SystemZ/cond-move-08.mir
    A llvm/test/CodeGen/SystemZ/cond-move-regalloc-hints-02.mir

  Log Message:
  -----------
  [SystemZ]  Add a mapping from "select register" to "load on condition" (2-addr).

The SELR(Mux) instructions can be converted to two-address form as LOCR(Mux)
instructions whenever one of the sources are the same reg as dest. By adding
this mapping in getTwoOperandOpcode(), we get:

- Two-address hints in getRegAllocationHints() for select register
  instructions.

- No need anymore for special handling in SystemZShortenInst.cpp -
  shortenSelect() removed.

The two-address hints are now added before the GRX32 hints, which should be
preferred.

Review: Ulrich Weigand
https://reviews.llvm.org/D68870