[all-commits] [llvm/llvm-project] f63b64: [llvm][MIRVRegNamerUtils] Adding hashing on CImm /...

[Puyan Lotfi via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: f63b64c0c3b486f164c3c66cce9f13df2bac6b6e
      https://github.com/llvm/llvm-project/commit/f63b64c0c3b486f164c3c66cce9f13df2bac6b6e
  Author: Puyan Lotfi <puyan at puyan.org>
  Date:   2019-12-16 (Mon, 16 Dec 2019)

  Changed paths:
    M llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
    A llvm/test/CodeGen/MIR/Generic/CFPImmMIRCanonHash.mir

  Log Message:
  -----------
  [llvm][MIRVRegNamerUtils] Adding hashing on CImm / FPImm MachineOperands.

This patch makes it so that cases where multiple instructions that
differ only in their ConstantInt or ConstantFP MachineOperand values no
longer collide. For instance:

%0:_(s1) = G_CONSTANT i1 true
%1:_(s1) = G_CONSTANT i1 false
%2:_(s32) = G_FCONSTANT float 1.0
%3:_(s32) = G_FCONSTANT float 0.0

Prior to this patch the first two instructions would collide together.
Also, the last two G_FCONSTANT instructions would also collide. Now they
will no longer collide.

Differential Revision: https://reviews.llvm.org/D71558