[all-commits] [llvm/llvm-project] bd0f27: [ARM][MVE] Add intrinsics for immediate shifts. (r...
Simon Tatham via All-commits
all-commits at lists.llvm.org
Wed Dec 11 02:10:25 PST 2019
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: bd0f271c9e55ab69b45258e4922869099ed18307
https://github.com/llvm/llvm-project/commit/bd0f271c9e55ab69b45258e4922869099ed18307
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2019-12-11 (Wed, 11 Dec 2019)
Changed paths:
M clang/include/clang/Basic/arm_mve.td
M clang/include/clang/Basic/arm_mve_defs.td
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGen/arm-mve-intrinsics/vector-shift-imm.c
M clang/utils/TableGen/MveEmitter.cpp
M llvm/include/llvm/IR/IntrinsicsARM.td
M llvm/lib/Target/ARM/ARMInstrMVE.td
A llvm/test/CodeGen/Thumb2/mve-intrinsics/vector-shift-imm.ll
Log Message:
-----------
[ARM][MVE] Add intrinsics for immediate shifts. (reland)
This adds the family of `vshlq_n` and `vshrq_n` ACLE intrinsics, which
shift every lane of a vector left or right by a compile-time
immediate. They mostly work by expanding to the IR `shl`, `lshr` and
`ashr` operations, with their second operand being a vector splat of
the immediate.
There's a fiddly special case, though. ACLE specifies that the
immediate in `vshrq_n` can take values up to //and including// the bit
size of the vector lane. But LLVM IR thinks that shifting right by the
full size of the lane is UB, and feels free to replace the `lshr` with
an `undef` half way through the optimization pipeline. Hence, to keep
this legal in source code, I have to detect it at codegen time.
Logical (unsigned) right shifts by the element size are handled by
simply emitting the zero vector; arithmetic ones are converted into a
shift of one bit less, which will always give the same output.
In order to do that check, I also had to enhance the tablegen
MveEmitter so that it can cope with converting a builtin function's
operand into a bare integer to pass to a code-generating subfunction.
Previously the only bare integers it knew how to handle were flags
generated from within `arm_mve.td`.
Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard
Reviewed By: dmgreen, MarkMurrayARM
Subscribers: echristo, hokein, rdhindsa, kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D71065
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