[all-commits] [llvm/llvm-project] f1ddef: [AArch64][SVE] Implement SPLAT_VECTOR for i1 vectors.

[Eli Friedman via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: f1ddef34f1c2a38145f855353e5fa0c0e94a7953
      https://github.com/llvm/llvm-project/commit/f1ddef34f1c2a38145f855353e5fa0c0e94a7953
  Author: Eli Friedman <efriedma at quicinc.com>
  Date:   2019-12-09 (Mon, 09 Dec 2019)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/sve-vector-splat.ll

  Log Message:
  -----------
  [AArch64][SVE] Implement SPLAT_VECTOR for i1 vectors.

The generated sequence with whilelo is unintuitive, but it's the best
I could come up with given the limited number of SVE instructions that
interact with scalar registers. The other sequence I was considering
was something like dup+cmpne, but an extra scalar instruction seems
better than an extra vector instruction.

Differential Revision: https://reviews.llvm.org/D71160