[all-commits] [llvm/llvm-project] 76a5c8: [MCRegInfo] Add forward sub and super register ite...

[Florian Hahn via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 76a5c8421e04b246892157fe18f1c082c908c5e9
      https://github.com/llvm/llvm-project/commit/76a5c8421e04b246892157fe18f1c082c908c5e9
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2019-12-05 (Thu, 05 Dec 2019)

  Changed paths:
    M llvm/include/llvm/MC/MCRegisterInfo.h
    M llvm/lib/CodeGen/MachineVerifier.cpp
    M llvm/lib/CodeGen/RegisterScavenging.cpp
    M llvm/lib/Target/Mips/MCTargetDesc/MipsOptionRecord.cpp
    M llvm/lib/Target/X86/X86RegisterInfo.cpp

  Log Message:
  -----------
  [MCRegInfo] Add forward sub and super register iterators. (NFC)

This patch adds forward iterators mc_difflist_iterator,
mc_subreg_iterator and mc_superreg_iterator, based on the existing
DiffListIterator. Those are used to provide iterator ranges over
sub- and super-register from TRI, which are slightly more convenient
than the existing MCSubRegIterator/MCSuperRegIterator. Unfortunately,
it duplicates a bit of functionality, but the new iterators are a bit
more convenient (and can be used with various existing iterator
utilities)  and should probably replace the old iterators in the future.

This patch updates some existing users.

Reviewers: evandro, qcolombet, paquette, MatzeB, arsenm

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D70565