[all-commits] [llvm/llvm-project] e47838: [ARM] Fix instruction selection for ARMISD::CMOV w...

[Victor Campos via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: e478385e7708d0bcef43559651e6d62e387a507a
      https://github.com/llvm/llvm-project/commit/e478385e7708d0bcef43559651e6d62e387a507a
  Author: Victor Campos <Victor.Campos at arm.com>
  Date:   2019-11-29 (Fri, 29 Nov 2019)

  Changed paths:
    M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
    M llvm/lib/Target/ARM/ARMInstrVFP.td
    A llvm/test/CodeGen/ARM/cmov_fp16.ll

  Log Message:
  -----------
  [ARM] Fix instruction selection for ARMISD::CMOV with f16 type

Summary:
In the cases where the CMOV (f16) SDNode is used with condition codes
LT, LE, VC or NE, it is successfully selected into a VSEL instruction.

In the remaining cases, however, instruction selection fails since VSEL
does not support other condition codes.

This patch handles such cases by using the single-precision version of
the VMOV instruction.

Reviewers: ostannard, dmgreen

Reviewed By: dmgreen

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70667