[all-commits] [llvm/llvm-project] a4cc89: [PowerPC] Implement the vector extend sign instruc...

[QingShan Zhang via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: a4cc895aee3b37e196f779883c8398a6cdd7ff68
      https://github.com/llvm/llvm-project/commit/a4cc895aee3b37e196f779883c8398a6cdd7ff68
  Author: QingShan Zhang <qshanz at cn.ibm.com>
  Date:   2019-11-22 (Fri, 22 Nov 2019)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCInstrAltivec.td
    A llvm/test/CodeGen/PowerPC/vector-extend-sign.ll

  Log Message:
  -----------
  [PowerPC] Implement the vector extend sign instruction pattern match
Power9 has instructions to implement the semantics of SIGN_EXTEND_INREG for vector type.
Mark it as legal and add the match pattern.

Differential Revision: https://reviews.llvm.org/D69601