[all-commits] [llvm/llvm-project] 6ba5cb: [mips] Add a 'generic' Mips CPU

[Miloš Stojanović via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 6ba5cbf3ea2315acf1b7f1c39c6fec6cca5560ca
      https://github.com/llvm/llvm-project/commit/6ba5cbf3ea2315acf1b7f1c39c6fec6cca5560ca
  Author: Miloš Stojanović <Milos.Stojanovic at rt-rk.com>
  Date:   2019-11-21 (Thu, 21 Nov 2019)

  Changed paths:
    M llvm/lib/Target/Mips/Mips.td
    M llvm/test/CodeGen/Mips/cpus.ll

  Log Message:
  -----------
  [mips] Add a 'generic' Mips CPU

Having a generic CPU removes a warning when creating a subtarget without
the CPU being explicitly specified.

Differential Revision: https://reviews.llvm.org/D70490