[all-commits] [llvm/llvm-project] 2d739f: [ARM] Allocatable Global Register Variables for ARM

aWelker via All-commits all-commits at lists.llvm.org
Mon Nov 18 02:08:15 PST 2019


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 2d739f98d8a53e38bf9faa88cdb6b0c2a363fb77
      https://github.com/llvm/llvm-project/commit/2d739f98d8a53e38bf9faa88cdb6b0c2a363fb77
  Author: Anna Welker <anna.welker at arm.com>
  Date:   2019-11-18 (Mon, 18 Nov 2019)

  Changed paths:
    M clang/docs/ClangCommandLineReference.rst
    M clang/include/clang/Basic/DiagnosticDriverKinds.td
    M clang/include/clang/Basic/DiagnosticGroups.td
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Basic/TargetInfo.h
    M clang/include/clang/Driver/Options.td
    M clang/lib/Basic/Targets/ARM.cpp
    M clang/lib/Basic/Targets/ARM.h
    M clang/lib/Driver/ToolChains/Arch/ARM.cpp
    M clang/lib/Sema/SemaDecl.cpp
    A clang/test/Driver/arm-reserved-reg-options.c
    A clang/test/Sema/arm-global-regs.c
    M llvm/lib/Target/ARM/ARM.td
    M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
    M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
    M llvm/lib/Target/ARM/ARMFrameLowering.cpp
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/lib/Target/ARM/ARMSubtarget.cpp
    M llvm/lib/Target/ARM/ARMSubtarget.h
    M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
    A llvm/test/CodeGen/ARM/reg-alloc-fixed-r6-vla.ll
    A llvm/test/CodeGen/ARM/reg-alloc-with-fixed-reg-r6-modified.ll
    A llvm/test/CodeGen/ARM/reg-alloc-with-fixed-reg-r6.ll
    A llvm/test/CodeGen/ARM/reg-alloc-wout-fixed-regs.ll
    A llvm/test/CodeGen/Thumb/callee_save_reserved.ll
    A llvm/test/Feature/reserve_global_reg.ll

  Log Message:
  -----------
  [ARM] Allocatable Global Register Variables for ARM

      Provides support for using r6-r11 as globally scoped
      register variables. This requires a -ffixed-rN flag
      in order to reserve rN against general allocation.

      If for a given GRV declaration the corresponding flag
      is not found, or the the register in question is the
      target's FP, we fail with a diagnostic.

      Differential Revision: https://reviews.llvm.org/D68862




More information about the All-commits mailing list