[all-commits] [llvm/llvm-project] 643ac6: [AArch64][v8.3a] Add LDRA '[xN]!' alias.

[Ahmed Bougacha via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 643ac6c0420b70571ef0fc0f65ab66e736eea225
      https://github.com/llvm/llvm-project/commit/643ac6c0420b70571ef0fc0f65ab66e736eea225
  Author: Ahmed Bougacha <ahmed at bougacha.org>
  Date:   2019-11-13 (Wed, 13 Nov 2019)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/test/MC/AArch64/armv8.3a-signed-pointer.s
    M llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt

  Log Message:
  -----------
  [AArch64][v8.3a] Add LDRA '[xN]!' alias.

The instruction definition has been retroactively expanded to
allow for an alias for '[xN, 0]!' as '[xN]!'.
That wouldn't make sense on LDR, but does for LDRA.


  Commit: 7313d7d6188a0ea1cebe3aa5ec27d53f4ccc1286
      https://github.com/llvm/llvm-project/commit/7313d7d6188a0ea1cebe3aa5ec27d53f4ccc1286
  Author: Ahmed Bougacha <ahmed at bougacha.org>
  Date:   2019-11-13 (Wed, 13 Nov 2019)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    A llvm/test/CodeGen/AArch64/branch-target-enforcement.mir
    R llvm/test/CodeGen/AArch64/branch-target-enforcment.mir

  Log Message:
  -----------
  [AArch64][v8.3a] Add missing imp-defs on RETA*.

RETA always implicitly uses LR, unlike RET which merely has an
alias that defaults it to LR.
Additionally, RETA implicitly uses SP as well, which it uses as
a discriminator to authenticate LR.

This isn't usually noticeable, because RET_ReallyLR is used in most
of the backend.  However, the post-RA scheduler, if enabled, will
cause miscompiles if the imp-uses are missing.

While there, fix a typo in the lone affected testcase.


Compare: https://github.com/llvm/llvm-project/compare/142cbe73e9fe...7313d7d6188a