[all-commits] [llvm/llvm-project] af1f5f: Merging r374164:

[Simon Atanasyan via All-commits]

  Branch: refs/heads/release/9.x
  Home:   https://github.com/llvm/llvm-project
  Commit: af1f5f7d9a79b3279a2faacc97551d4c584d3fe2
      https://github.com/llvm/llvm-project/commit/af1f5f7d9a79b3279a2faacc97551d4c584d3fe2
  Author: Simon Atanasyan <simon at atanasyan.com>
  Date:   2019-11-07 (Thu, 07 Nov 2019)

  Changed paths:
    M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp

  Log Message:
  -----------
  Merging r374164:

------------------------------------------------------------------------
r374164 | atanasyan | 2019-10-09 06:12:21 -0700 (Wed, 09 Oct 2019) | 8 lines

[mips] Split expandLoadImmReal into multiple methods. NFC

The `expandLoadImmReal` handles four different and almost non-overlapping
cases: loading a "single" float immediate into a GPR, loading a "single"
float immediate into a FPR, and the same couple for a "double" float
immediate.

It's better to move each `else if` branch into separate methods.
------------------------------------------------------------------------


  Commit: 7423211163942fde6665f39b0be29170d3c1ee2b
      https://github.com/llvm/llvm-project/commit/7423211163942fde6665f39b0be29170d3c1ee2b
  Author: Simon Atanasyan <simon at atanasyan.com>
  Date:   2019-11-07 (Thu, 07 Nov 2019)

  Changed paths:
    M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp

  Log Message:
  -----------
  Merging r374165:

------------------------------------------------------------------------
r374165 | atanasyan | 2019-10-09 06:12:27 -0700 (Wed, 09 Oct 2019) | 1 line

[mips] Rename local variable. NFC
------------------------------------------------------------------------


  Commit: 94970749d6f75921e2bf34a437db9d14121c0596
      https://github.com/llvm/llvm-project/commit/94970749d6f75921e2bf34a437db9d14121c0596
  Author: Simon Atanasyan <simon at atanasyan.com>
  Date:   2019-11-07 (Thu, 07 Nov 2019)

  Changed paths:
    M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
    M llvm/test/MC/Mips/macro-li.d.s

  Log Message:
  -----------
  Merging r374544 and r374548:

------------------------------------------------------------------------
r374544 | atanasyan | 2019-10-11 05:33:12 -0700 (Fri, 11 Oct 2019) | 12 lines

[mips] Fix loading "double" immediate into a GPR and FPR

If a "double" (64-bit) value has zero low 32-bits, it's possible to load
such value into a GP/FP registers as an instruction immediate. But now
assembler loads only high 32-bits of the value.

For example, if a target register is GPR the `li.d $4, 1.0` instruction
converts into the `lui $4, 16368` one. As a result, we get `0x3FF00000`
in the register. While a correct representation of the `1.0` value is
`0x3FF0000000000000`. The patch fixes that.

Differential Revision: https://reviews.llvm.org/D68776
------------------------------------------------------------------------

------------------------------------------------------------------------
r374548 | atanasyan | 2019-10-11 05:58:37 -0700 (Fri, 11 Oct 2019) | 1 line

[mips] Follow-up to r374544. Fix test case.
------------------------------------------------------------------------


Compare: https://github.com/llvm/llvm-project/compare/2c69f98463a2...94970749d6f7