[all-commits] [llvm/llvm-project] 217986: [AArch64] Select saturating Neon instructions

[David Green via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 2179867ddc2990b141d53ade1d66fc1af66b412e
      https://github.com/llvm/llvm-project/commit/2179867ddc2990b141d53ade1d66fc1af66b412e
  Author: David Green <david.green at arm.com>
  Date:   2019-10-31 (Thu, 31 Oct 2019)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/sadd_sat.ll
    M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
    M llvm/test/CodeGen/AArch64/ssub_sat.ll
    M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
    M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
    M llvm/test/CodeGen/AArch64/usub_sat_vec.ll

  Log Message:
  -----------
  [AArch64] Select saturating Neon instructions

This adds some extra patterns to select AArch64 Neon SQADD, UQADD, SQSUB
and UQSUB from the existing target independent sadd_sat, uadd_sat,
ssub_sat and usub_sat nodes.

It does not attempt to replace the existing int_aarch64_neon_uqadd
intrinsic nodes as they are apparently used for both scalar and vector,
and need to be legal on scalar types for some of the patterns to work.
The int_aarch64_neon_uqadd on scalar would move the two integers into
floating point registers, perform a Neon uqadd and move the value back.
I don't believe this is good idea for uadd_sat to do the same as the
scalar alternative is simpler (an adds with a csinv). For signed it may
be smaller, but I'm not sure about it being better.

So this just adds some extra patterns for the existing vector
instructions, matching on the _sat nodes.

Differential Revision: https://reviews.llvm.org/D69374