[all-commits] [llvm/llvm-project] 215da6: [clang][llvm] Obsolete Exynos M1 and M2

Evandro Menezes via All-commits all-commits at lists.llvm.org
Wed Oct 30 13:03:21 PDT 2019


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 215da6606c0efa1f2bc91de87abfd3dc7163b1bd
      https://github.com/llvm/llvm-project/commit/215da6606c0efa1f2bc91de87abfd3dc7163b1bd
  Author: Evandro Menezes <e.menezes at samsung.com>
  Date:   2019-10-30 (Wed, 30 Oct 2019)

  Changed paths:
    M clang/test/CodeGen/arm-target-features.c
    M clang/test/Driver/aarch64-cpus.c
    M clang/test/Driver/arm-cortex-cpus.c
    M clang/test/Frontend/aarch64-target-cpu.c
    M clang/test/Preprocessor/aarch64-target-features.c
    M clang/test/Preprocessor/arm-target-features.c
    M llvm/docs/WritingAnLLVMBackend.rst
    M llvm/include/llvm/Support/AArch64TargetParser.def
    M llvm/include/llvm/Support/ARMTargetParser.def
    M llvm/lib/Support/Host.cpp
    M llvm/lib/Target/AArch64/AArch64.td
    R llvm/lib/Target/AArch64/AArch64SchedExynosM1.td
    M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
    M llvm/lib/Target/AArch64/AArch64Subtarget.h
    M llvm/lib/Target/ARM/ARM.td
    M llvm/test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir
    M llvm/test/CodeGen/AArch64/arm64-ldp-cluster.ll
    M llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll
    M llvm/test/CodeGen/AArch64/arm64-st1.ll
    M llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll
    M llvm/test/CodeGen/AArch64/cpus.ll
    M llvm/test/CodeGen/AArch64/jump-table-exynos.ll
    M llvm/test/CodeGen/AArch64/machine-combiner-madd.ll
    M llvm/test/CodeGen/AArch64/max-jump-table.ll
    M llvm/test/CodeGen/AArch64/misched-fusion-aes.ll
    M llvm/test/CodeGen/AArch64/no-quad-ldp-stp.ll
    M llvm/test/CodeGen/AArch64/preferred-function-alignment.ll
    M llvm/test/CodeGen/AArch64/remat.ll
    M llvm/test/CodeGen/AArch64/strqu.ll
    M llvm/test/CodeGen/ARM/build-attributes.ll
    M llvm/test/tools/llvm-mca/AArch64/Exynos/direct-branch.s
    M llvm/test/tools/llvm-mca/AArch64/Exynos/extended-register.s
    M llvm/test/tools/llvm-mca/AArch64/Exynos/scheduler-queue-usage.s
    M llvm/test/tools/llvm-mca/AArch64/Exynos/shifted-register.s
    M llvm/unittests/Support/Host.cpp
    M llvm/unittests/Support/TargetParserTest.cpp

  Log Message:
  -----------
  [clang][llvm] Obsolete Exynos M1 and M2




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