[all-commits] [llvm/llvm-project] 3da269: [X86] Add a DAG combine to turn (and (bitcast (vXi...

topperc via All-commits all-commits at lists.llvm.org
Mon Oct 28 11:27:37 PDT 2019


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 3da269a2489f156462fca74311842d761151393f
      https://github.com/llvm/llvm-project/commit/3da269a2489f156462fca74311842d761151393f
  Author: Craig Topper <craig.topper at intel.com>
  Date:   2019-10-28 (Mon, 28 Oct 2019)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/movmsk-cmp.ll
    M llvm/test/CodeGen/X86/vector-compare-all_of.ll
    M llvm/test/CodeGen/X86/vector-compare-any_of.ll
    M llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
    M llvm/test/CodeGen/X86/vector-reduce-or-bool.ll

  Log Message:
  -----------
  [X86] Add a DAG combine to turn (and (bitcast (vXi1 (concat_vectors (vYi1 setcc), undef,))), C) into (bitcast (vXi1 (concat_vectors (vYi1 setcc), zero,)))

The legalization of v2i1->i2 or v4i1->i4 bitcasts followed by a setcc can create an and after the bitcast. If we're lucky enough that the input to the bitcast is a concat_vectors where the first operand is a setcc that can natively 0 all the upper bits of ak-register, then we should replace the other operands of the concat_vectors with zero in order to remove the AND.

With the AND removed we might be able to use a kortest on the result.

Differential Revision: https://reviews.llvm.org/D69205




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