[all-commits] [llvm/llvm-project] 35cb3e: [AArch64][Builtins] Avoid unnecessary cache cleaning

[Bryan Chan via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 35cb3ee4ca477095bb3dd74f60ab932e185be63f
      https://github.com/llvm/llvm-project/commit/35cb3ee4ca477095bb3dd74f60ab932e185be63f
  Author: Bryan Chan <bryan.chan at huawei.com>
  Date:   2019-10-28 (Mon, 28 Oct 2019)

  Changed paths:
    M compiler-rt/lib/builtins/clear_cache.c

  Log Message:
  -----------
  [AArch64][Builtins] Avoid unnecessary cache cleaning

Use new control bits CTR_EL0.DIC and CTR_EL0.IDC to discover the d-cache
cleaning and i-cache invalidation requirements for instruction-to-data
coherence. This matches the behavior in the latest libgcc.

Author: Shaokun Zhang <zhangshaokun at hisilicon.com>

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D69247