[all-commits] [llvm/llvm-project] a27c99: [BPF] fix a CO-RE issue with -mattr=+alu32

yonghong-song via All-commits all-commits at lists.llvm.org
Fri Oct 25 14:27:43 PDT 2019


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: a27c998c0060eef006ca9e225e4d12a35f4d1912
      https://github.com/llvm/llvm-project/commit/a27c998c0060eef006ca9e225e4d12a35f4d1912
  Author: Yonghong Song <yhs at fb.com>
  Date:   2019-10-25 (Fri, 25 Oct 2019)

  Changed paths:
    M llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
    A llvm/test/CodeGen/BPF/CORE/field-reloc-alu32.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-array.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-1.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-2.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-3.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-1.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-2.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-3.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-2.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-1.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-2.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-3.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-1.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-2.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-3.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-struct.ll
    M llvm/test/CodeGen/BPF/CORE/intrinsic-union.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-access-str.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-basic.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-1.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-2.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-1.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-2.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-3.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-1.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-2.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-end-load.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-end-ret.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-global-1.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-global-2.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-global-3.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-ignore.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-middle-chain.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-multi-array-1.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-multi-array-2.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-multilevel.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-pointer-1.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-pointer-2.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-struct-anonymous.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-struct-array.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-array.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-struct.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-union.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef.ll
    M llvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll

  Log Message:
  -----------
  [BPF] fix a CO-RE issue with -mattr=+alu32

Ilya Leoshkevich (<iii at linux.ibm.com>) reported an issue that
with -mattr=+alu32 CO-RE has a segfault in BPF MISimplifyPatchable
pass.

The pattern will be transformed by MISimplifyPatchable
pass looks like below:
  r5 = ld_imm64 @"b:0:0$0:0"
  r2 = ldw r5, 0
  ... r2 ... // use r2
The pass will remove the intermediate 'ldw' instruction
and replacing all r2 with r5 likes below:
  r5 = ld_imm64 @"b:0:0$0:0"
  ... r5 ... // use r5
Later, the ld_imm64 insn will be replaced with
  r5 = <patched immediate>
for field relocation purpose.

With -mattr=+alu32, the input code may become
  r5 = ld_imm64 @"b:0:0$0:0"
  w2 = ldw32 r5, 0
  ... w2 ... // use w2
Replacing "w2" with "r5" is incorrect and will
trigger compiler internal errors.

To fix the problem, if the register class of ldw* dest
register is sub_32, we just replace the original ldw*
register with:
  w2 = w5
Directly replacing all uses of w2 with in-place
constructed w5 for the use operand seems not working in all cases.

The latest kernel will have -mattr=+alu32 on by default,
so added this flag to all CORE tests.
Tested with latest kernel bpf-next branch as well with this patch.

Differential Revision: https://reviews.llvm.org/D69438




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