[all-commits] [llvm/llvm-project] 171cf5: AMDGPU/GlobalISel: Handle flat/global G_ATOMIC_CMP...

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 171cf5302f43776b07615e32b2ffd6ddf4e5d890
      https://github.com/llvm/llvm-project/commit/171cf5302f43776b07615e32b2ffd6ddf4e5d890
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2019-10-25 (Fri, 25 Oct 2019)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
    M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    A llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomic-cmpxchg-with-success.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomic-cmpxchg.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Handle flat/global G_ATOMIC_CMPXCHG

Custom lower this to a target instruction with the merge operands. I
think it might be better to directly select this and emit a
REG_SEQUENCE, but this would be more work since it would require
splitting the tablegen patterns for these cases from the other
atomics.