[all-commits] [llvm/llvm-project] a5376f: [GlobalISel][AArch64][AMDGPU][X86] Teach Legalizat...

[topperc via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: a5376f6322132e3b0664de55348f6bbba1fabd00
      https://github.com/llvm/llvm-project/commit/a5376f6322132e3b0664de55348f6bbba1fabd00
  Author: Craig Topper <craig.topper at intel.com>
  Date:   2019-10-24 (Thu, 24 Oct 2019)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ext-legalizer.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
    M llvm/test/CodeGen/X86/GlobalISel/add-ext.ll
    M llvm/test/CodeGen/X86/GlobalISel/ashr-scalar.ll
    M llvm/test/CodeGen/X86/GlobalISel/ext-x86-64.ll
    M llvm/test/CodeGen/X86/GlobalISel/ext.ll
    M llvm/test/CodeGen/X86/GlobalISel/gep.ll
    M llvm/test/CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir
    M llvm/test/CodeGen/X86/GlobalISel/lshr-scalar.ll
    M llvm/test/CodeGen/X86/GlobalISel/shl-scalar.ll
    M llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-sitofp.mir

  Log Message:
  -----------
  [GlobalISel][AArch64][AMDGPU][X86] Teach LegalizationArtifactCombiner to combine trunc(g_constant).

This allows X86 to properly form shift by immediate instructions
since we require an 8-bit constant to match the imported
SelectionDAG patterns.