[www-scripts] Sphinx Doc Update: SUCCESS

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Thu Feb 1 13:05:00 PST 2018


UPDATING llvm SOURCES
Updating '.':
U    lib/CodeGen/LivePhysRegs.cpp
U    lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
U    lib/Transforms/Scalar/LoopStrengthReduce.cpp
U    lib/Transforms/IPO/FunctionImport.cpp
U    lib/Transforms/IPO/GlobalOpt.cpp
U    lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
U    lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
U    lib/Transforms/AggressiveInstCombine/AggressiveInstCombineInternal.h
U    lib/Transforms/InstCombine/InstCombineCalls.cpp
U    lib/Transforms/InstCombine/InstCombineCasts.cpp
U    lib/Transforms/Utils/BasicBlockUtils.cpp
U    lib/Transforms/Utils/GlobalStatus.cpp
U    lib/MC/WasmObjectWriter.cpp
U    lib/MC/MCAssembler.cpp
U    lib/CodeGen/TargetPassConfig.cpp
U    lib/CodeGen/TailDuplicator.cpp
U    lib/CodeGen/MIRParser/MILexer.cpp
U    lib/CodeGen/RegAllocGreedy.cpp
U    lib/CodeGen/TargetLoweringBase.cpp
U    lib/CodeGen/MachineCopyPropagation.cpp
U    lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
U    lib/CodeGen/MachineCombiner.cpp
U    lib/CodeGen/MachineOutliner.cpp
U    lib/CodeGen/CodeGenPrepare.cpp
U    lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
U    lib/CodeGen/SelectionDAG/FastISel.cpp
U    lib/CodeGen/SelectionDAG/DAGCombiner.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U    lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
U    lib/CodeGen/LiveRegMatrix.cpp
U    lib/CodeGen/TargetRegisterInfo.cpp
U    lib/CodeGen/GlobalISel/LegalizerHelper.cpp
U    lib/Object/WasmObjectFile.cpp
U    lib/Support/Statistic.cpp
U    lib/Analysis/SyntheticCountsUtils.cpp
U    lib/Analysis/TargetLibraryInfo.cpp
U    lib/Analysis/Lint.cpp
U    lib/Target/Mips/MipsInstrInfo.td
U    lib/Target/Mips/MicroMipsInstrFormats.td
U    lib/Target/Mips/MicroMipsInstrInfo.td
U    lib/Target/Mips/MipsEVAInstrInfo.td
U    lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
U    lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h
U    lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
U    lib/Target/AMDGPU/SIInstrInfo.cpp
U    lib/Target/AMDGPU/SIInstructions.td
U    lib/Target/AMDGPU/BUFInstructions.td
U    lib/Target/AMDGPU/AMDGPUInstrInfo.td
U    lib/Target/AMDGPU/VOP2Instructions.td
U    lib/Target/AMDGPU/AMDGPUISelLowering.cpp
U    lib/Target/AMDGPU/AMDGPUISelLowering.h
U    lib/Target/AMDGPU/SIISelLowering.cpp
U    lib/Target/SystemZ/SystemZISelLowering.cpp
D    test/Transforms/InstCombine/pr33765.ll
D    test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll
U    lib/Target/ARM/ARMLegalizerInfo.cpp
U    lib/Target/ARM/ARMISelLowering.h
U    lib/Target/ARM/ARMISelLowering.cpp
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86InstrArithmetic.td
U    lib/Target/X86/X86RetpolineThunks.cpp
U    lib/Target/AArch64/AArch64SchedThunderX2T99.td
U    lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
U    lib/Target/Hexagon/HexagonISelLowering.cpp
U    test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn-addrspace-addressing-modes.ll
U    test/Transforms/LoopStrengthReduce/X86/macro-fuse-cmp.ll
U    test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
A    test/Transforms/AggressiveInstCombine/trunc_unreachable_bb.ll
U    test/MC/ARM/diagnostics.s
U    test/CodeGen/AMDGPU/flat-load-clustering.mir
U    test/CodeGen/AMDGPU/movrels-bug.mir
U    test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
A    test/MC/ELF/uleb-ehtable.s
U    test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
U    test/CodeGen/AMDGPU/schedule-regpressure.mir
U    test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir
U    test/CodeGen/AMDGPU/insert-waits-callee.mir
U    test/CodeGen/AMDGPU/shrink-carry.mir
U    test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir
U    test/CodeGen/AMDGPU/endpgm-dce.mir
U    test/CodeGen/AMDGPU/fold-cndmask.mir
U    test/CodeGen/AMDGPU/ret.ll
U    test/CodeGen/AMDGPU/liveness.mir
U    test/CodeGen/AMDGPU/hazard.mir
U    test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
A    test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
U    test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir
U    test/CodeGen/AMDGPU/sdwa-gfx9.mir
A    test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
U    lib/Target/ARM/Thumb1InstrInfo.h
U    lib/Target/ARM/ARMInstrVFP.td
U    lib/Target/PowerPC/PPCRegisterInfo.h
U    lib/Target/X86/X86ISelDAGToDAG.cpp
U    lib/Target/X86/X86MacroFusion.cpp
U    lib/Target/AArch64/AArch64SchedExynosM3.td
U    lib/Target/Hexagon/HexagonISelLowering.h
U    lib/Target/Hexagon/HexagonPatterns.td
U    test/Feature/elf-linker-options.ll
U    test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll
U    test/Transforms/InstCombine/cast-mul-select.ll
U    test/Transforms/AggressiveInstCombine/trunc_multi_uses.ll
U    test/LTO/Resolution/X86/not-prevailing.ll
U    test/MC/WebAssembly/weak-alias.ll
U    test/CodeGen/AMDGPU/inserted-wait-states.mir
U    test/CodeGen/AMDGPU/hazard-inlineasm.mir
U    test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
U    test/CodeGen/AMDGPU/splitkit.mir
U    test/CodeGen/AMDGPU/dead_copy.mir
U    test/CodeGen/AMDGPU/break-vmem-soft-clauses.mir
U    test/CodeGen/AMDGPU/rename-independent-subregs.mir
U    test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.d16.ll
U    test/CodeGen/AMDGPU/subreg_interference.mir
A    test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
U    test/CodeGen/AMDGPU/vop-shrink-frame-index.mir
U    test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
U    test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
U    test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
U    test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
U    test/CodeGen/AMDGPU/optimize-if-exec-masking.mir
U    test/CodeGen/AMDGPU/subreg-intervals.mir
U    test/CodeGen/AMDGPU/bitreverse.ll
U    test/CodeGen/AMDGPU/misched-killflags.mir
U    test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
U    test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
U    test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
U    test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll
U    test/CodeGen/AMDGPU/spill-empty-live-interval.mir
U    test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir
U    test/CodeGen/AMDGPU/syncscopes.ll
U    test/CodeGen/AMDGPU/bswap.ll
A    test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
U    test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir
U    test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
U    test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
U    test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir
U    test/CodeGen/AMDGPU/fold-multiple.mir
U    test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.format.d16.ll
U    test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
U    test/CodeGen/AMDGPU/regcoal-subrange-join.mir
U    test/CodeGen/AMDGPU/insert-skips-kill-uncond.mir
U    test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
U    test/CodeGen/AMDGPU/detect-dead-lanes.mir
U    test/CodeGen/AMDGPU/merge-load-store.mir
U    test/CodeGen/AMDGPU/twoaddr-mad.mir
U    test/CodeGen/AMDGPU/regcoalesce-dbg.mir
U    test/CodeGen/AMDGPU/fold-operands-order.mir
U    test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
U    test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.d16.ll
U    test/CodeGen/AMDGPU/clamp-omod-special-case.mir
U    test/CodeGen/AMDGPU/scalar-store-cache-flush.mir
U    test/CodeGen/AMDGPU/fix-wwm-liveness.mir
U    test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
U    test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
U    test/CodeGen/AMDGPU/merge-load-store-vreg.mir
U    lib/Target/ARM/Thumb1InstrInfo.cpp
U    lib/Target/ARM/ARMInstrInfo.td
U    lib/Target/ARM/README.txt
U    lib/Target/X86/X86.h
U    lib/Target/X86/X86InstrInfo.cpp
U    lib/Target/AArch64/AArch64SchedExynosM1.td
U    lib/Target/AArch64/AArch64ISelLowering.cpp
U    lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
U    test/Verifier/test_g_phi.mir
U    test/Transforms/LoopStrengthReduce/X86/nested-loop.ll
A    test/Transforms/CodeGenPrepare/ARM/memory-intrinsics.ll
A    test/Transforms/InstCombine/icmp-mul-zext.ll
U    test/Transforms/AggressiveInstCombine/trunc_const_expr.ll
A    test/MC/Disassembler/ARM/unpredictable-MVN-arm.txt
U    test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
U    test/CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir
U    test/CodeGen/AMDGPU/insert-waits-exp.mir
U    test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
U    test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
U    test/CodeGen/AMDGPU/cluster-flat-loads-postra.mir
U    test/CodeGen/AMDGPU/regcoalesce-prune.mir
U    test/CodeGen/AMDGPU/smrd.ll
U    test/CodeGen/AMDGPU/invert-br-undef-vcc.mir
U    test/CodeGen/AMDGPU/break-smem-soft-clauses.mir
U    test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir
U    test/CodeGen/AMDGPU/sdwa-preserve.mir
U    test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir
U    test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
U    test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir
U    test/CodeGen/AMDGPU/readlane_exec0.mir
U    test/CodeGen/AMDGPU/coalescer-subreg-join.mir
U    test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir
U    test/CodeGen/AMDGPU/limit-coalesce.mir
U    test/CodeGen/AMDGPU/debug-value2.ll
U    test/CodeGen/AMDGPU/sdwa-scalar-ops.mir
U    test/CodeGen/AMDGPU/cluster-flat-loads.mir
U    test/CodeGen/AMDGPU/sendmsg-m0-hazard.mir
U    test/CodeGen/AMDGPU/sdwa-vop2-64bit.mir
D    test/CodeGen/Thumb/stm-scavenging.ll
U    test/CodeGen/AMDGPU/wqm.mir
U    test/CodeGen/AMDGPU/llvm.dbg.value.ll
U    test/CodeGen/AMDGPU/callee-special-input-sgprs.ll
U    test/CodeGen/SystemZ/fp-conv-17.mir
U    test/CodeGen/SystemZ/regalloc-fast-invalid-kill-flag.mir
U    test/CodeGen/SystemZ/lower-copy-undef-src.mir
U    test/CodeGen/Thumb/tbb-reuse.mir
A    test/CodeGen/Thumb/pr35836_2.ll
U    test/CodeGen/ARM/fpoffset_overflow.mir
U    test/CodeGen/ARM/GlobalISel/arm-select-globals-ropi-rwpi.mir
U    test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
U    test/CodeGen/ARM/GlobalISel/arm-legalize-vfp4.mir
U    test/CodeGen/ARM/GlobalISel/arm-legalizer.mir
U    test/CodeGen/ARM/pei-swiftself.mir
U    test/CodeGen/AMDGPU/waitcnt-permute.mir
U    test/CodeGen/AMDGPU/waitcnt.mir
U    test/CodeGen/AMDGPU/multilevel-break.ll
A    test/CodeGen/SystemZ/loop-04.ll
U    test/CodeGen/SystemZ/fp-cmp-07.mir
U    test/CodeGen/SystemZ/RAbasic-invalid-LR-update.mir
U    test/CodeGen/Thumb/thumb-shrink-wrapping.ll
A    test/CodeGen/Thumb/pr35836.ll
U    test/CodeGen/ARM/ifcvt_simple_bad_zero_prob_succ.mir
U    test/CodeGen/ARM/GlobalISel/arm-select-globals-static.mir
U    test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir
U    test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
U    test/CodeGen/ARM/GlobalISel/arm-instruction-select-combos.mir
U    test/CodeGen/ARM/tail-dup-bundle.mir
U    test/CodeGen/AMDGPU/merge-m0.mir
U    test/CodeGen/AMDGPU/fix-vgpr-copies.mir
U    test/CodeGen/SystemZ/load-and-test.mir
A    test/CodeGen/SystemZ/pr36164.ll
U    test/CodeGen/SystemZ/pr32505.ll
U    test/CodeGen/SystemZ/clear-liverange-spillreg.mir
U    test/CodeGen/ARM/atomic-op.ll
U    test/CodeGen/ARM/imm-peephole-thumb.mir
U    test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
U    test/CodeGen/ARM/GlobalISel/arm-select-globals-pic.mir
U    test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir
U    test/CodeGen/ARM/GlobalISel/arm-select-copy_to_regclass-of-fptosi.mir
U    test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.d16.ll
U    test/CodeGen/AMDGPU/reduce-saveexec.mir
U    test/CodeGen/SystemZ/vec-sub-01.ll
U    test/CodeGen/SystemZ/cond-move-04.mir
U    test/CodeGen/SystemZ/cond-move-05.mir
U    test/CodeGen/SystemZ/store_nonbytesized_vecs.ll
U    test/CodeGen/Thumb/machine-cse-physreg.mir
U    test/CodeGen/ARM/debug-info-arg.ll
U    test/CodeGen/ARM/GlobalISel/select-pr35926.mir
U    test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll
U    test/CodeGen/ARM/GlobalISel/arm-instruction-select-cmp.mir
U    test/CodeGen/ARM/dbg-range-extension.mir
U    test/CodeGen/ARM/swifterror.ll
U    test/CodeGen/ARM/prera-ldst-insertpt.mir
U    test/CodeGen/ARM/misched-int-basic.mir
U    test/CodeGen/ARM/load_store_opt_kill.mir
U    test/CodeGen/ARM/constant-islands-cfg.mir
U    test/CodeGen/ARM/peephole-phi.mir
U    test/CodeGen/ARM/ARMLoadStoreDBG.mir
U    test/CodeGen/ARM/cmp2-peephole-thumb.mir
U    test/CodeGen/ARM/intrinsics-overflow.ll
U    test/CodeGen/ARM/select-imm.ll
U    test/CodeGen/ARM/cmp1-peephole-thumb.mir
U    test/CodeGen/ARM/PR32721_ifcvt_triangle_unanalyzable.mir
U    test/CodeGen/ARM/scavenging.mir
U    test/CodeGen/ARM/thumb1-ldst-opt.ll
U    test/CodeGen/ARM/imm-peephole-arm.mir
U    test/CodeGen/ARM/debug-info-branch-folding.ll
U    test/CodeGen/ARM/misched-int-basic-thumb2.mir
U    test/CodeGen/ARM/machine-copyprop.mir
U    test/CodeGen/ARM/2014-01-09-pseudo_expand_implicit_reg.ll
U    test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll
U    test/CodeGen/PowerPC/ppc64-byval-align.ll
U    test/CodeGen/PowerPC/opt-li-add-to-addi.ll
U    test/CodeGen/PowerPC/convert-rr-to-ri-instrs-R0-special-handling.mir
U    test/CodeGen/PowerPC/debuginfo-stackarg.ll
U    test/CodeGen/PowerPC/licm-tocReg.ll
U    test/CodeGen/ARM/Windows/vla-cpsr.ll
U    test/CodeGen/ARM/virtregrewriter-subregliveness.mir
U    test/CodeGen/ARM/fp16-instructions.ll
U    test/CodeGen/PowerPC/expand-isel-4.mir
U    test/CodeGen/PowerPC/expand-isel-5.mir
U    test/CodeGen/PowerPC/debuginfo-split-int.ll
U    test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir
U    test/CodeGen/PowerPC/byval-agg-info.ll
U    test/CodeGen/ARM/expand-pseudos.mir
U    test/CodeGen/ARM/ifcvt_simple_unanalyzable.mir
U    test/CodeGen/PowerPC/addisdtprelha-nonr3.mir
U    test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir
U    test/CodeGen/PowerPC/expand-isel-6.mir
U    test/CodeGen/PowerPC/tail-dup-layout.ll
U    test/CodeGen/PowerPC/licm-remat.ll
U    test/CodeGen/PowerPC/convert-rr-to-ri-instrs-out-of-range.mir
U    test/CodeGen/PowerPC/expand-isel-1.mir
U    test/CodeGen/PowerPC/aantidep-def-ec.mir
U    test/CodeGen/PowerPC/expand-isel-2.mir
U    test/CodeGen/PowerPC/expand-isel-3.mir
U    test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll
U    test/CodeGen/PowerPC/fp64-to-int16.ll
U    test/CodeGen/PowerPC/expand-isel-9.mir
U    test/CodeGen/PowerPC/select-i1-vs-i1.ll
U    test/CodeGen/PowerPC/tls_get_addr_fence2.mir
U    test/CodeGen/Lanai/peephole-compare.mir
U    test/CodeGen/X86/masked_gather_scatter.ll
U    test/CodeGen/PowerPC/load-two-flts.ll
U    test/CodeGen/PowerPC/quadint-return.ll
U    test/CodeGen/PowerPC/expand-isel-10.mir
U    test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
U    test/CodeGen/X86/lea-opt-with-debug.mir
U    test/CodeGen/X86/update-terminator.mir
U    test/CodeGen/X86/bitreverse.ll
U    test/CodeGen/X86/3addr-or.ll
U    test/CodeGen/X86/mulvi32.ll
U    test/CodeGen/X86/avx512-schedule.ll
U    test/CodeGen/X86/avx512-hadd-hsub.ll
U    test/CodeGen/X86/vector-trunc.ll
U    test/CodeGen/X86/pr32284.ll
U    test/CodeGen/X86/vec_cmp_uint-128.ll
U    test/CodeGen/X86/ipra-reg-alias.ll
U    test/CodeGen/X86/vector-tzcnt-128.ll
U    test/CodeGen/X86/horizontal-reduce-smin.ll
U    test/CodeGen/X86/implicit-null-checks.mir
U    test/CodeGen/X86/localescape.ll
U    test/CodeGen/X86/select_const.ll
U    test/CodeGen/X86/vector-shift-shl-256.ll
U    test/CodeGen/X86/machine-combiner-int.ll
U    test/CodeGen/X86/tbm-intrinsics-fast-isel.ll
U    test/CodeGen/X86/xray-multiplerets-in-blocks.mir
U    test/CodeGen/X86/sext-i1.ll
U    test/CodeGen/X86/oddshuffles.ll
U    test/CodeGen/X86/shuffle-vs-trunc-256.ll
U    test/CodeGen/X86/bitcast-setcc-256.ll
U    test/CodeGen/X86/statepoint-stack-usage.ll
U    test/CodeGen/X86/avx512-calling-conv.ll
U    test/CodeGen/X86/eflags-copy-expansion.mir
U    test/CodeGen/X86/avx512-trunc.ll
U    test/CodeGen/X86/avx512dq-intrinsics.ll
U    test/CodeGen/X86/atomic-eflags-reuse.ll
U    test/CodeGen/X86/peephole-recurrence.mir
U    test/CodeGen/X86/avx512dqvl-intrinsics-upgrade.ll
U    test/CodeGen/X86/vector-shuffle-512-v16.ll
U    test/CodeGen/X86/madd.ll
U    test/CodeGen/X86/popcnt.ll
U    test/CodeGen/X86/gpr-to-mask.ll
U    test/CodeGen/X86/shrink-compare.ll
U    test/CodeGen/X86/sse2-schedule.ll
U    test/CodeGen/X86/mul-constant-result.ll
U    test/CodeGen/X86/rdpid-schedule.ll
U    test/CodeGen/X86/widen_conv-3.ll
U    test/CodeGen/X86/divrem.ll
U    test/CodeGen/X86/bitcast-int-to-vector-bool.ll
U    test/CodeGen/X86/2006-03-01-InstrSchedBug.ll
U    test/CodeGen/X86/vec_fp_to_int.ll
U    test/CodeGen/X86/fminnum.ll
U    test/CodeGen/X86/avx512-vec-cmp.ll
U    test/CodeGen/X86/combine-shl.ll
U    test/CodeGen/X86/cmov-into-branch.ll
U    test/CodeGen/X86/horizontal-reduce-umax.ll
U    test/CodeGen/X86/vector-shuffle-v1.ll
U    test/CodeGen/X86/2012-08-16-setcc.ll
U    test/CodeGen/X86/vector-trunc-math.ll
U    test/CodeGen/X86/pr32345.ll
U    test/CodeGen/X86/avx512dqvl-intrinsics.ll
U    test/CodeGen/X86/machine-region-info.mir
U    test/CodeGen/X86/vector-bitreverse.ll
U    test/CodeGen/X86/vector-compare-results.ll
U    test/CodeGen/X86/avx512bw-mov.ll
U    test/CodeGen/X86/pr34592.ll
U    test/CodeGen/X86/update-terminator-debugloc.ll
U    test/CodeGen/X86/avx512-insert-extract.ll
U    test/CodeGen/X86/avx512dq-mask-op.ll
U    test/CodeGen/X86/avx512-shift.ll
A    test/CodeGen/X86/haddsub-3.ll
U    test/CodeGen/X86/bool-simplify.ll
U    test/CodeGen/X86/win64_frame.ll
U    test/CodeGen/X86/pr32329.ll
U    test/CodeGen/X86/shift-combine.ll
U    test/CodeGen/X86/vector-compare-any_of.ll
U    test/CodeGen/X86/vector-rotate-128.ll
U    test/CodeGen/ARM/GlobalISel/arm-call-lowering.ll
U    test/CodeGen/ARM/ifcvt_diamond_unanalyzable.mir
U    test/CodeGen/ARM/single-issue-r52.mir
U    test/CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir
U    test/CodeGen/ARM/vldm-liveness.mir
U    test/CodeGen/ARM/ifcvt_canFallThroughTo.mir
U    test/CodeGen/ARM/v6-jumptable-clobber.mir
U    test/CodeGen/ARM/ifcvt_forked_diamond_unanalyzable.mir
U    test/CodeGen/ARM/sched-it-debug-nodes.mir
U    test/CodeGen/ARM/prera-ldst-aliasing.mir
U    test/CodeGen/PowerPC/gpr-vsr-spill.ll
U    test/CodeGen/PowerPC/scavenging.mir
U    test/CodeGen/PowerPC/livephysregs.mir
U    test/CodeGen/PowerPC/expand-isel-7.mir
U    test/CodeGen/PowerPC/expand-isel-8.mir
U    test/CodeGen/PowerPC/fma-mutate.ll
U    test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll
U    test/CodeGen/PowerPC/tls_get_addr_fence1.mir
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U    include/llvm/CodeGen/AccelTable.h
U    include/llvm/IR/IntrinsicsAMDGPU.td
U    tools/obj2yaml/wasm2yaml.cpp
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U    test/CodeGen/Hexagon/rdf-ehlabel-live.mir
U    test/CodeGen/Hexagon/mux-kill3.mir
U    test/CodeGen/Hexagon/expand-condsets-rm-reg.mir
U    test/CodeGen/Hexagon/regalloc-liveout-undef.mir
U    test/CodeGen/Hexagon/cext-opt-numops.mir
U    test/CodeGen/Hexagon/hwloop-redef-imm.mir
U    test/CodeGen/Hexagon/expand-condsets-impuse.mir
U    test/CodeGen/Hexagon/cext-opt-range-offset.mir
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U    test/CodeGen/Hexagon/livephysregs-add-pristines.mir
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U    test/CodeGen/Mips/llvm-ir/shl.ll
U    test/CodeGen/Mips/instverify/dextm-pos.mir
U    test/CodeGen/Mips/instverify/ins-pos.mir
U    test/CodeGen/Mips/instverify/dinsu-pos-size.mir
U    test/CodeGen/Mips/instverify/ext-pos.mir
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U    test/CodeGen/Mips/instverify/ext-pos-size.mir
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U    test/CodeGen/SPARC/32abi.ll
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U    test/DebugInfo/COFF/pieces.ll
U    test/DebugInfo/X86/live-debug-vars-dse.mir
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U    test/DebugInfo/X86/dbg-addr.ll
U    test/DebugInfo/X86/sdag-salvage-add.ll
U    test/DebugInfo/X86/vla.ll
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U    test/DebugInfo/MIR/X86/live-debug-values-spill.mir
U    test/DebugInfo/MIR/X86/no-cfi-loc.mir
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U    unittests/Transforms/Utils/CMakeLists.txt
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A    unittests/Transforms/Utils/BasicBlockUtils.cpp
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U    unittests/Transforms/Utils/Local.cpp
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U    unittests/MI/LiveIntervalTest.cpp
Updated to revision 324004.
-- Could NOT find LibXml2 (missing:  LIBXML2_LIBRARIES LIBXML2_INCLUDE_DIR) 
-- Native target architecture is X86
-- Threads enabled.
-- Doxygen disabled.
-- Go bindings disabled.
-- Could NOT find OCaml (missing:  OCAMLFIND OCAML_VERSION OCAML_STDLIB_PATH) 
-- Could NOT find OCaml (missing:  OCAMLFIND OCAML_VERSION OCAML_STDLIB_PATH) 
-- OCaml bindings disabled.
-- Found Python module pygments
-- Found Python module pygments.lexers.c_cpp
-- Found Python module yaml
-- LLVM host triple: x86_64-unknown-linux-gnu
-- LLVM default target triple: x86_64-unknown-linux-gnu
-- Building with -fPIC
-- Constructing LLVMBuild project information
-- Linker detection: GNU ld
-- Targeting AArch64
-- Targeting AMDGPU
-- Targeting ARM
-- Targeting BPF
-- Targeting Hexagon
-- Targeting Lanai
-- Targeting Mips
-- Targeting MSP430
-- Targeting NVPTX
-- Targeting PowerPC
-- Targeting Sparc
-- Targeting SystemZ
-- Targeting X86
-- Targeting XCore
-- Linker detection: GNU ld
-- Sphinx enabled.
-- Clang version: 7.0.0
-- Sphinx enabled.
-- Sphinx enabled.
-- LLD version: 7.0.0
-- Sphinx enabled.
-- Sphinx enabled.
-- Configuring done
-- Generating done
-- Build files have been written to: /opt/sphinx-docs/build/llvm
Generating html Sphinx documentation for llvm into "/opt/sphinx-docs/build/llvm/docs/html"
/opt/venv/sphinx/local/lib/python2.7/site-packages/sphinx/util/requests.py:64: UserWarning: Some links may return broken results due to being unable to check the Server Name Indication (SNI) in the returned SSL cert against the hostname in the url requested. Recommended to install "requests[security]" as a dependency or upgrade to a python version with SNI support (Python 3 and Python 2.7.9+).
  'Some links may return broken results due to being unable to '
/opt/sphinx-docs/src/llvm/docs/AMDGPUUsage.rst:4121: WARNING: Citation [OpenCL] is not referenced.
/opt/sphinx-docs/src/llvm/docs/AMDGPUUsage.rst:4119: WARNING: Citation [DWARF] is not referenced.
Built target docs-llvm-html
sending incremental file list
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sent 9,617,842 bytes  received 3,853 bytes  19,243,390.00 bytes/sec
total size is 13,891,715  speedup is 1.44


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